ITEL 202 – MIDTERM REVIEWER

PARTS OF THE MOTHERBOARD

CPU serves as the "brain" of the computer, processing

data, running software, and controlling the overall
operation of the system.

consists of an arithmetic logic unit (ALU) for

mathematical operations, a control unit for
managing instructions, and registers for temporary
data storage
CPU SOCKET designed to hold and connect a central processing
unit (CPU)

interface between the CPU and the motherboard

CPU FAN AND HEATSINK MOUNT mechanism used to cool the central processing
unit (CPU) in a computer.

HEATSINK is a metal or alloy block with fins that

absorb and dissipate heat generated by the CPU

CPU FAN is small electric fan that is positioned on

top of the heatsink. It serves to increase the
airflow around the heatsink, expediting the cooling
process
CPU FAN CONNECTOR type of electrical socket found on a computer's
motherboard specifically designed for connecting
and controlling the CPU fan
DIMM (DUAL IN-LINE MEMORY MODULE) standardized slot on a computer's motherboard
MEMORY SLOTS used for installing system memory (RAM)
SUPER IO CHIP critical component on a motherboard that
manages a range of input and output operations,
particularly related to older hardware components
and system monitoring.
 24-PIN ATX POWER CONNECTOR primary power connection between a computer's
power supply unit (PSU) and its motherboard
FLOPPY DRIVE CONNECTOR used to connect a floppy disk drive to a
computer's motherboard. It allows data transfer
and power supply to the floppy drive.
IDE (INTEGRATED DRIVE ELECTORNICS) is a parallel data and power connection used for
CONNECTOR connecting hard drives, CD/DVD drives, and other
storage devices to a computer motherboard

replaced by SATA connectors in modern

computers.
SATA CONNECTOR is a data and power connection used for
connecting storage devices, such as hard drives
and SSDs, to a computer motherboard.
BIOS FLASH CHIP IN PLCC SOCKET removable integrated circuit on a computer
motherboard that stores the BIOS firmware

allows for easy removal and replacement of the

BIOS chip, which holds essential system
instructions and settings
SOUTHBRIDGE manages various input/output functions, including
peripheral connections, USB ports, audio, and
more
NORTHBRIDGE handles memory and CPU communication
CMOS (COMPLEMENTARY METAL-OXIDE- provides power to the CMOS memory, preserving
SEMICONDUCTOR) BACKUP BATTERY system settings and the real-time clock when the
computer is turned off or disconnected from
power.
INTEGRATED GRAPHICS PROCESSOR provides basic graphics capabilities without the
need for a separate graphics card.
PCI SLOT standard expansion slot on a computer
motherboard that allows for the installation of
various peripheral cards to expand the computer’s
capabilities
INTEGRATED AUDIO CODEC CHIP handles audio input and output functions,
providing sound capabilities without the need for a
separate sound card.
INTEGRATED GIGABIT ETHERNET CHIP component that provides high-speed network
connectivity, enabling wired internet connections
without the need for a separate network card.
PCI EXPRESS SLOT expansion slot on a computer motherboard used
to connect various hardware components, such as
graphics cards, network cards, and storage
devices
CONNECTORS FOR INTEGRATED PERIPHERALS
USB PORTS used for connecting a wide range of peripherals,
including keyboards, mice, printers, external hard
drives, and more.
AUDIO PORTS allow you to connect speakers, headphones,
microphones, and other audio devices.
ETHERNET PORT used for wired network connections, allowing you
to connect to a local area network (LAN)
PS/2 PORTS connecting older PS/2-style keyboards and mice.
VIDEO PORTS Connect various display devices like VGA, HDMI
 SERIAL PORT transmits data sequentially, one bit at a time

commonly used for connecting peripherals like old

printers and modems
PARALLEL PORT transmits data in parallel, sending multiple bits
simultaneously, typically used for connecting
printers and other peripherals

HISTORY OF COMPUTERS

COMPUTERS electronic computers were given this name

because they performed the work that had
previously been assigned to people. "Computer"
was originally a job title
GENERATION ZERO: MECHANICAL CALCULATING MACHINES (1642– 1945)
ABACUS early aid for mathematical computations.

the oldest surviving abacus was used in 300 B.C.

by the Babylonians
JOHN NAPIER invented logarithms, which are a technology that
allows multiplication to be performed via addition
NAPIER’S BONES Napier also invented an alternative to tables,
where the logarithm values were carved on ivory
sticks
SLIDE RULE Napier's invention led directly to the slide rule,
first built in England in 1632

still in use in the 1960's by the NASA engineers of

the Mercury, Gemini, and Apollo programs
LEONARDO DA VINCI made drawings of gear-driven calculating
machines but apparently never built any.
CALCULATING CLOCK first gear-driven calculating machine to actually be
built

named by its inventor, the German professor

Wilhelm Schickard in 1623
BLAISE PASCAL invented the Pascaline as an aid for his father
who was a tax collector

invented the 6-digit and 8-digit pascaline

GOTTFRIED WILHELM LEIBNIZ managed to build a four-function (addition,
subtraction, multiplication, and division) calculator
that he called the stepped reckoner
JOSEPH MARIE JACQUARD invented a power loom that could base its weave
upon a pattern automatically read from punched
wooden cards
JACQUARD’S LOOM selecting particular cards for Jacquard's loom you
defined the woven pattern
TECHNOLOGY -VS- JOBS Jacquard's technology was a real boon to mill
owners, but put many loom operators out of work.
Angry mobs smashed Jacquard looms and once
attacked Jacquard himself.
CHARLE’S BABBAGE Charles Babbage was proposing a steam driven
calculating machine the size of a room, which he
called the Difference Engine
 DIFFERENCE ENGINE be able to compute tables of numbers, such as
logarithm tables.

became the most expensive government funded

project

The device was never finished.

BABBAGE-ANALYTIC ENGINE This device, large as a house and powered by 6
steam engines,

was programmable, thanks to the punched card

technology of Jacquard

had a key function that distinguishes computers

from calculators: the conditional statement
ADA BYRON earned her spot in history as the first computer
programmer.

invented the subroutine and was the first to

recognize the importance of looping.
US CENSUS census bureau offered a prize for an inventor to
help with the 1890 census and this prize was won
by Herman Hollerith
HOLLERITH DESK a card reader which sensed the holes in the cards

a gear driven mechanism which could count

large wall of dial indicators to display the results of

the count
IBM Hollerith built a company, the Tabulating Machine
Company eventually became International
Business Machines, known today as IBM.
HOLLERITH’S INOVATION By using punch cards, Hollerith created a way to
store and retrieve information.

This was the first type of read and write

technology
US MILITARY desired a mechanical calculator more optimized
for scientific computation
MARK I built as a partnership between Harvard and IBM in
1944

first programmable digital computer made in the

U.S.
THE FIRST BUG Discovered by Grace Hopper

Hopper found the first computer "bug": a dead

moth that had gotten into the Mark I
FIRST GENERATION COMPUTERS: VACUUM The first electronic computer was designed at
TUBE COMPUTERS Iowa State between 1939-1942

Atanasoff-Berry Computer used the binary

system(1’s and 0’s).

Contained vacuum tubes and stored numbers for

 calculations by burning holes in paper
VACUUM TUBE they control the flow of electrons in electrical
systems
ATANASOFF – BERRY COMPUTER One of the earliest attempts to build an all-
electronic digital computer by J. V. Atanasoff

first to store data as a charge on a capacitor,

COLOSSUS built during World War II by Britain for the purpose
of breaking the cryptographic codes used by
Germany.
ENIAC which stood for Electronic Numerical Integrator
and Calculator.

built by John Mauchly and J. Presper Eckert

used 18,000 vacuum tubes to hold a charge,

Vacuum tubes were so notoriously unreliable
STORED PROGRAM COMPUTER John von Neumann presented his idea of a
computer that would store computer instructions
in a CPU

CPU consisted of elements that would control the

computer electronically
EDVAC Eckert and Mauchly's next teamed up with the
mathematician John von Neumann to design
SECOND GENERATION COMPUTERS: the transistor was invented
TRANSISTORIZED COMPUTERS (1954–1965)
transistor made computers smaller, less
expensive and increased calculating speeds.

saw a new way data was stored

UNIVAC was the first commercial (mass produced)
computer.

first computer to employ magnetic tape.

THIRD GENERATION COMPUTERS: Transistors were replaced by integrated
INTEGRATED CIRCUIT COMPUTERS (1965– circuits(IC)
1980)
made computers even smaller and faster
FOURTH GENERATION COMPUTERS: VLSI Intel Corporation invented the Microprocessor: an
COMPUTERS (1980–????) entire CPU on one chip
TIME-SHARING computer gave each user a tiny sliver of time in a
round-robin fashion
TELETYPE motorized typewriter that could transmit your
keystrokes to the mainframe
BATCH-MODE PROCESSING the computer gives its full attention to your
program
MICROPROCESSOR is a computer that is fabricated on an integrated
circuit
INTEGRATED CIRCUITS a small sliver of silicon the size of your thumbnail

allowed computers to be faster, led to a new age

of computers
NUMBER SYSTEM

binary numbers Uses 0 and 1 digits

Decimal numbers sum of each digit times a power of ten expanded
notation
BINARY TO DECIMAL

DECIMAL TO BINARY

OCTAL has eight basic digits: 0,1,2,3,4,5,6,7.

base 8 number system

DECIMAL TO OCTAL

OCTAL TO DECIMAL

OCTAL TO BINARY
 HEXADECIMAL SYSTEM Hexadecimal System uses 16 digits:
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F

base is 16

COMPUTER ORGANIZATION AND ARCHITECTURE AND DATA REPRESENTATION IN COMPUTER

SYSTEMS

Institute of Electrical and Electronics organization dedicated to the advancement of the

Engineers (IEEE) professions of electronic and computer
engineering

International Telecommunications Union (ITU) concerns itself with the interoperability of

telecommunications systems, including telephone,
telegraph, and data communication systems.
International Organization for Standardization entity that coordinates worldwide standards
(ISO) development, including the activities of ANSI with
BSI, among others
Moore’s Law / ROCK’S LAW proposed by early Intel capitalist Arthur Rock

arises from the observations of a financier who

saw the price tag of new chip facilities escalate
from about $12,000 in 1968 to $12 million in the
mid-1990s
COMPUTER LEVEL HIERARCHY
LEVEL 0 Digital logic (circuits, gates, etc.)
LEVEL 1 Control (microcode or hardwired)
LEVEL 2 Machine (instruction set architecture)
LEVEL 3 System Software (operating system, library code)
LEVEL 4 Assembly Language (Assembly code)
LEVEL 5 High-Level Language (C++,Java, etc.)
LEVEL 6 User (Executable Programs)

VON NEUMANN MODEL

- Consists of three hardware systems:

o A central processing unit (CPU) with a control unit,
o an arithmetic logic unit (ALU), registers (small storage areas),
 o and a program counter; a main memory system, which holds programs that control the
computer’s operation; and an I/O system.
- ideas present in the von Neumann architecture have been extended so that programs and data
stored in a slow-to-access storage medium, such as a hard disk, can be copied to a fast-access,
volatile storage medium such as RAM prior to execution.
- Contains a single path, either physically or logically, between the main memory system and the
control unit of the CPU

FETCH-DECODE-EXECUTE CYCLE

- control unit fetches the next program instruction from the memory,
- instruction is decoded into a language the ALU can understand
- data operands required to execute the instruction are fetched from memory and placed in
registers in the CPU
- ALU executes the instruction and places the results in registers or memory

VON NEUMANN ARCHITECTURE

THE MODIFIED VON NEUMANN ARCHITECTURE, ADDING A SYSTEM BUS

THREE TYPES OF BUS (DATA BUS, ADDRESS BUS, CONTROL BUS)

BASIC LOGIC GATES

NOT GATE
AND GATE

OR GATE

NAND GATE

NOR GATE

DEMORGAN’S THEOREM
 NAND GATE

De Morgan’s Theorem-1 ~(X & Y) = ~X | ~Y

NOT all variables
Change & to | and | to &
NOT the result

NOR Gate

De Morgan’s Theorem-2 ~(X | Y) = ~X & ~Y

NOT all variables
Change & to | and | to &
NOT the result
Exclusive-OR Gate (@)

Exclusive-NOR Gate (~^)

Multiple-input AND Gate Output Z1 is HIGH only if all inputs are HIGH
An open input will float HIGH

Multiple-input OR Gate Output Z2 is LOW only if all inputs are LOW

 Multiple-input NAND Gate Output Z3 is LOW only if all inputs are HIGH

Multiple-input NOR Gate Output Z4 is HIGH only if all inputs are LOW

SIMPLE COMPUTER

CPU Is the brain of the computer

It does all the processing

in charge of retrieving the next instruction from

memory (fetch), decoding and executing it

Execution usually requires the use of ALU and

temporary storage in registers
TWO AREAS OF CPU
DATAPATH registers and ALU (the execution unit)
CONTROL UNIT in charge of performing the fetch-execute cycle
TWO KINDS OF REGISTERS
USER REGISTERS store data and addresses

Computers will have between :One and hundreds

of registers and Possibly divided into data and
address registers

usually the size of the computer’s word size

CONTROL REGISTERS that store information used by the control unit to
perform the fetch-execute cycle
PARTS OF CONTROL REGISTERS
PC (PROGRAM COUNTER) the memory location of the next instruction
Role in Fetch Execute Cycle:
- CPU uses the value stored in the PC to
access memory and retrieve the
instruction at that address
- PC is incremented to point to the next
sequential instruction in memory, allowing
the CPU to continue executing
instructions sequentially.

IR (INSTRUCTION REGISTER) the current instruction being executed

 Role in Fetch Execute Cycle:
- instruction fetched from memory is placed
in the IR.
- instruction is then decoded and executed
during the execute phase
- holds the opcode (operation code) of the
instruction, which is used to determine the
operation to be performed.
STATUS FLAGS information about the results of the last instruction
executed
Role in Fetch Execute Cycle:
- Status flags are set or cleared based on
the outcome of arithmetic, logical, or
comparison operations.
- These flags are used by conditional
branch instructions to make decisions
about program flow
COMMON FLAGS OF STATUS FLAGS
Zero Flag (Z) result of an operation is zero.
Negative Flag (N) result of an operation is negative.
Carry Flag (C) arithmetic operation generates a carry or borrow.
Overflow Flag (V or O) produces a result too large or too small to be
represented.
Sign Flag (S) sign of the result (positive or negative).
ALU Consists of circuits to perform arithmetic and logic
operations
- Adder
- Multiplier
- Shifter
- Comparator
- Operations in the ALU set status flags
(carry, overflow, positive, zero, negative)
temporary registers before moving results back to
register or memory
CONTROL UNIT managing the fetch-execute cycle
sends out control signals to all other devices
control signal indicates that the device should
activate or perform it’s function
SYSTEM CLOCK regulate when the CU issues its control signals,
computers use a system clock

At each clock pulse, the control unit goes on to

the next task
- Register values are loaded or stored at
the beginning of a clock pulse
- ALU circuits activate at the beginning of a
clock pulse

Clock performance is based on the number of

pulses per second, or its Gigahertz rating

BUS collection of wires that allow current to flow over

them
current is the information being passed between
components
 PARTS OF THE BUS
Data Bus data and program instructions
Control Bus control signals from the CU to the devices
Address Bus address of the memory location or I/O device that
is to perform the given operation
OTHER TYPES OF BUSES
LOCAL BUS connects registers, ALU and CU together
SYSTEM BUS connects CPU to main memory
I/O subsystem connects to this bus through the
expansion bus
THREE TYPES OF INFORMATION THE SYSTEM BUS CARRIES
Address from the CPU of the intended item to be accessed
Control Information status information
Data either being sent to the device, or from the device
to CPU
EXPANSION OR I/O BUS connects System bus to I/O devices

collection of expansion slots and what gets

plugged into them
TWO TYPES OF DEVICES THE BUSES CONNECT
Masters Devices that can initiate requests (CPU, some I/O
devices)
Slaves Devices that only respond to requests from
masters (memory, some I/O devices)
POINT-TO-POINT BUS directly connects two devices
MULTIPOINT EXPANSION BUS connect multiple components
BUS ARBITRATION
Daisy chain arbitration Each device has a bus request line on the control
bus
Centralized parallel arbitration bus itself contains an arbiter
Distributed arbitration Devices themselves to determine who gets to use
the bus
Distributed arbitration using collision It’s a free-for-all, but if a device detects that
detection another device is using the bus, this device waits
a short amount of time before trying again
I/O SUBSYSTEM different types of I/O devices

I/O devices can vary in their speed and usage,

the CPU does not directly control these devices
TWO FORMS TO COMMUNICATE TO THE RIGHT I/O DEVICE
Memory-mapped I/O interface has its own memory which are
addressed as if they were part of main memory
Isolated I/O where the input and output operations are
separated or isolated from the core memory and
processing unit
INTERRUPTS interruption of the CPU so that it can switch its
attention from your program to something else
THE INTERRUPT PROCESS
At the end of each fetch-execute cycle, the CPU checks to see if an interrupt has arisen
Step 1 CPU saves what it was doing
Step 2 CPU figures out who raised the interrupt and
executes an interrupt handler to handle that type
of interrupt
Step 3 CPU restores the interrupted program by
 retrieving the values from the run-time stack
MARIE Machine Architecture that is Really Intuitive &
Easy

MARIE’S ARCHITECTURE

• Data stored in binary, two’s complement

• Stored programs  stores program data and instructions in same memory

• 16-bit word size with word addressing (you can only get words from memory, not bytes)

• 4K of main memory using 12 bit addresses, 16-bit data

• 16-bit instructions (4 bits for the op code, 12 bits for the address of the datum in memory)

OPCODE (4 BITS)

- specifies the type of operation or action that the CPU should perform
- allows for up to 16 different operation codes, providing a limited set of fundamental operations
that the MARIE CPU can execute

MEMORY ADDRESS

- This address points to the location in memory where the data associated with the instruction is
located or where the result should be stored.

REGISTERS IN MARIE

AC (ACCUMULATOR) this is the only data register (16 bits)

PC (PROGRAM COUNTER) keeps track of the memory address of the next
instruction to be executed (12 bits)
IR (INSTRUCTION REGISTER) temporarily holds the current instruction being
executed (16 bits)
MAR (MEMORY ADDRESS REGISTER) holds the memory address to be sent to memory
during memory read or write operations. (12 bits)
MBR (MEMORY BUFFER REGISTER) temporary storage location for data that is being
transferred between the CPU and memory (16
bits)
8-BIT INPUT AND 8-BIT OUTPUT REGISTERS 8-bit Input Register (often labeled INREG) is used
to hold data received from external input devices

8-bit Output Register (often labeled OUTREG) is

used to store data that the CPU intends to send to
external output devices
STATUS FLAGS represent the outcome of operations,

MARIE CPU

- MAR sends to memory, the MBR stores the data being sent to memory or retrieved from memory
- InREG and OutREG receive data from and send data to I/O respectively
 -

MARIE’S INTERCONNECTION

- The registers are interconnected, and connected with main memory through a common data bus
- Each device on the bus is identified by a unique number that is set on the control lines
- permits data transfer between these devices without use of the main data bus

MARIE’S FETCH-EXECUTE CYCLE

PC stores the location in memory of the next Instruction

1) fetch instruction by sending the address to memory (PC to MAR to memory)

2) memory sends back instruction over data bus, to MBR, move it to IR, increment PC

3) Decode the instruction (look at op code, place 8-bit data address in MAR if needed

4) If operand (Memory value) required, fetch it from memory

operand is the part of a computer instruction which specifies what data is to be

manipulated or operated on.

5) Execute instruction

6) If necessary, process interrupt

MARIE’S ISA

- computer’s instruction set architecture specifies the format of its instructions and the primitive
operations that the machine can perform
- ISA is an interface between a computer’s hardware and its software
- consists of only 13 instructions
MARIE’S INSTRUCTIONS

- format of a MARIE instruction

-
- fundamental MARIE instructions are: