Discover and create logic circuits
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Feb 11, 2023 - JavaScript
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flip-flop
Here are 26 public repositories matching this topic...
Flip flop setup, hold & metastability explorer tool
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Oct 28, 2022 - Jupyter Notebook
Materials for the Computer Science course, Digital Design (Logic Circuits)
counter memory decoding karnaugh-map logic-gates boolean-algebra multiplexer adder shift-register registers digital-design digital-systems canonical-forms flip-flop combinational-logic sequential-logic number-systems subtractor logic-circuits programmable-logic
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Apr 25, 2022 - C++
FuzzyNSGA-II-Algorithm (Fuzzy adaptive optimisation method)
genetic-algorithm power genetic-algorithms fuzzy-logic fuzzy-sets nsga-ii nsga2 mosfet-transistor flip-flop hspice mosfet non-dominated-solutions d-flipflop non-dominated-sorting flip-flops hspice-model non-dominating-sorting mosfets fuzzy-nsga-ii fnsga-ii
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Jul 2, 2022 - MATLAB
Implementaciones para diseño de sistemas digitales, comenzando por Flip Flops, registros, autómatas (Máquinas de Moore y Máquinas de Mealy), memorias ROM y sensores de presencia, utilizando para cada uno de estos, distintos contadores (anillo, década, etc).
constants counter vhdl ipn galaxy galaxy-project registro contador moore-to-mealy digital-design mealy-machine escom flip-flop secuenciales moore-machine marquesina gal22v10 rom-memories
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Jun 10, 2017 - VHDL
An eurorack logic module with several logic functions and a clock divider mode. Build around an arduino nano. So could be reprogrammed.
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Dec 19, 2023 - C++
💻 Repositório para Disciplina EEL5105 - Circuitos e Técnicas Digitais - UFSC
language counter fsm register digital hardware clock timer machine vhdl circuits description sequential multiplexer techniques quartus flip-flop multisim latch combinational
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Apr 3, 2020 - VHDL
⏱️ A step-by-step Logisim Evolution guide for building a digital stopwatch – COS10004 Assignment 1 (2024).
buffer stopwatch assignment buffers logic-gates cos logic-circuit stopwatch-application flip-flop swinburne flip-flops 2024 cos10004
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Apr 20, 2025
Download my Redstone World: https://www.planetminecraft.com/project/redstone-circuits-6024948/
world ram binary memory clock cycle redstone ticks rom minecraft-resourcepack flip-flop half-adder latch combinational-circuit full-adder sequential-circuit full-subtractor half-subtractor
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Aug 20, 2023 - Python
This GitHub repository contains coursework projects related to computer systems design. It includes various assignments and projects that cover topics such as digital logic design, computer architecture, and hardware description languages.
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Jul 25, 2023 - VHDL
This MPLAB X Melody code example shows how to make an LED blink using the Configurable Custom Logic (CCL) found in the AVR® DB. The CCL is configured as a toggling J-K flip-flop. The toggling is a result of a timer event.
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Jul 2, 2023 - C
Embedded Systems Lab Work
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Dec 18, 2020 - Verilog
porject from designing with VHDL course. Includes, FSM (finite state machine), next state logic,seven-segment-display-decode, full adder, flip flops, D_flip-flops, ripple carry adder, full adder, half adder, delay propagation
fsm delay vhdl finite-state-machine battleship fulladder battleship-game seven-segments-display flip-flop flip-flops ripple-carry-adder adder-subtractor next-state-logic delay-propogation
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Dec 28, 2023
Testers for some non elementary integrated circuits: Adder 74283, D Flip-Flop 74174 & Counter 74193 written to be run from PSoC 4
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Jan 17, 2022 - C
This repository contains all home and lab assignments for the CSE 206: Digital Logic Design Sessional course, part of our Term-1, Level-2 curriculum. It applies theories from CSE 205 to implement digital logics and practically experience them.
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Aug 13, 2024
Compilation of Verilog behavioral models and test benches for the four types of flip-flops (SR, JK, D, and T)
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Dec 25, 2022 - Verilog
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