Chapter 1

Data Representation
(4 Hrs)
Prepared By: Rolisha Sthapit
CONTENTS
1.1 Data Representation: Binary Representation, BCD, Alphanumeric
Representation, Complements ((r-1)’s Complement and r’s complement), Fixed
Point representation, Representing Negative Numbers, Floating Point
Representation, Arithmetic with Complements (Subtraction of Unsigned Numbers,
Addition and Subtraction of Signed Numbers), Overflow, Detecting Overflow
1.2 Other Binary Codes: Gray Code, self Complementing Code, Weighted Code
(2421 and 8421 codes), Excess-3 Code, EBCDIC
1.3 Error Detection Codes: Parity Bit, Odd Parity, Even parity, Parity Generator &
Checker
Computer Organization vs Architecture
• Computer Architecture refers to those attributes of a system that have a direct impact on the
logical execution of a program. Examples:
- the instruction set
- the number of bits used to represent various data types
- I/O mechanisms
- memory addressing techniques
• Computer Organization refers to the operational units and their interconnections that
realize the architectural specifications. Examples are things that are transparent to the
programmer:
- control signals
- interfaces between computer and peripherals
- the memory technology being used.
• So, for example, the fact that a multiply instruction is available is a computer
architecture issue. How that multiply is implemented is a computer organization issue.
• Architecture is those attributes visible to the programmer - Instruction set, number of
bits used for data representation, I/O mechanisms, addressing techniques. e.g. Is there a
multiply instruction?
• Organization is how features are implemented - Control signals, interfaces, memory
technology. e.g. Is there a hardware multiply unit or is it done by repeated addition?
• Computer architecture is concerned with the structure and behavior of computer
system as seen by the user.
• Computer organization is concerned with the way the hardware components operate
and the way they are connected together to form a computer system.
1.1 Data Representation: Data Types:
• The term “data” refers to factual information used for analysis or reasoning.
• The data types found in the registers of digital computers may be classified as being
one of the following categories:
(1) Numbers used in arithmetic computation,
(2) Letters of the alphabet used in data processing,
(3) Other discrete symbols used for specific purposes.
• Data are numbers and other binary-coded information that are operated on to achieve
required computational results.
• The Binary Number System is the most natural system used in digital computer but
sometimes it is convenient to employ different number system especially decimal
number system since it is used by people for performing arithmetic operations.
Number System
• A number system of base or radix is a system that uses distinct symbols for ‘r’
digit symbols to determine the quantity that the number represents. It is necessary
to multiply each digit by an integer power of ‘r’ and the sum all the weighted
digits.
• We can categorize number system as below:
- Binary number system (r = 2)
- Octal Number System (r = 8)
- Decimal Number System (r = 10)
- Hexadecimal Number system (r = 16)
Exercise
1. Convert binary 101101 to decimal
2. Convert Hexadecimal number F3 to decimal
3. Convert decimal 41 to Binary
4. Convert decimal 153 to octal.
5. Convert decimal 235 to hexadecimal
6. Convert decimal (0.6875) to binary
(Answer 1: 45 2: 243 3: 101001 4:231 5: EB 6: 0.1011)
Complements
• Complements are used in digital systems for simplifying the subtraction operation
and for logic manipulation, simplifying operations leads to simpler, less expensive
to implement.
• Two types of complements are:
i) r’s complement (Radix Complement)
ii) (r-1)’s complement (The Diminished Radix Complement)
i. r-1’s Complement:

For 1’s Complement of 1101100 For 9’s Complement of 246700

Solution: Make 0 to 1 and 1 to 0 Solution: Subtract from 999999
0010011 (999999-246700) = 753299
(The number of 9 should be equal to the
number given)
ii. r’s Complement:

For2’s Complement of 1101100 For 10’s Complement of 246700

Solution: First find 1’s complement Solution: Subtract from 999999
0010011 (999999-246700) = 753299
Add 1 Add 1
= 0010100 = 753300
• To find (r-1)’s complement, subtract all digit from (r-1).
• E.g. for 1’s complement, subtract each digit from 1.
• for 7’s complement, subtract each digit from 7.
• for 9’s complement, subtract each digit from 9.
• for 15’s complement, subtract each digit from 15.
And,
• To find r’s complement, subtract each digit from (r-1), and then add 1 to the last digit.
• E.g. for 2’s complement, subtract each digit from 1, and then add 1 to the last digit.
• for 8’s complement, subtract each digit from 7, and then add 1 to the last digit.
• for 10’s complement, subtract each digit from 9, and then add 1 to the last digit.
Subtraction with r’s complement
• Subtraction of two positive numbers (M - N), both of base r, is done as follows:
i) Add M to r’s complement of N.
ii) If an end carry occurs, discard it. What is left is result.
iii) If an end carry does not occur, take r’s complement of the number obtained in step
(i) and place a negative sign in front. That is the result.
• Subtraction with (r-1)’s complement
• Subtraction of two positive numbers (M - N), both of base r, is done as follows:
i) Add M to (r-1)’s complement of N.
ii) If an end carry occurs, add 1 to LSB. What is received is result.
iii) If an end carry does not occur, take (r-1)’s complement of the number obtained in
step (i) and place a negative sign in front. That is the result.
Fixed Point Representation
• There may be signed and unsigned numbers. In ordinary arithmetic, a negative
number is represented by a ‘-’ sign and positive number by a ‘+’ sign.
• Because of hardware limitations, computers must represent everything in 1’s and
0’s, including the sign of a number.
• As a consequence it is necessary to represent the sign with a bit placed in the left
most position of the number. The convention is to make the sign bit equal to 0 for
positive and 1 for negative.
• In addition to the sign, a number may have a binary point. The position of the binary
point is needed to represent fractions, integers or mixed integer fraction numbers.
• There are two ways of specifying the position of the binary point: by giving it a
fixed point or by employing a floating point representation.
• The fixed point method assumes that the binary point is always fixed in one
position. Fixed point position usually uses one of the two following positions:
 A binary point in the extreme left of the register to make the stored number a
fraction.
 A binary point in the extreme right of a register to make the stored number an
integer.
Integer Representation
• When an integer is positive, the MSB or signed bit is 0 and the remaining bits
represents the magnitude.
• When an integer is negative, the MSB or signed bit is1 but the rest of the number
can be represented in one of the three ways:
- Signed Magnitude Representation
- Signed 1’s Complement Representation
- Signed 2’s Complement Representation
Suppose, we have 8-bit register.
- For +ve number,
i) Signed-magnitude representation
When an integer binary number is positive, the sign is represented by 0 and the magnitude by a
positive binary number.
E.g. +14 = 0 0001110
- For –ve number,
i) Signed-magnitude representation
1 for the -ve sign followed by binary equivalent of that number. E.g. -14 = 1 0001110
ii) Signed-1’s complement representation
1 for the -ve sign followed by 1’s complement of that number. E.g. -14 = 1 1110001
iii) Signed-2’s complement representation
1 for the -ve sign followed by 2’s complement of that number. E.g. -14 = 1 1110010
Arithmetic addition and subtraction of
signed numbers
Addition
• Mostly signed 2's complement system is used. So, in this system only addition and
complement is used.
• Procedure: add two numbers including sign bit and discard any carry out of the sign bit
position. (note: negative numbers initially be in the 2's complement and that if the sum
obtained after the addition is negative, it is in 2's complement form)
Subtraction:
• Subtraction of two signed binary numbers is done as: take the 2's complement of the subtrahend
(including the sign bit) and add it to the minuend (including the sign-bit). The carry out of the sign
bit position is discarded.
• Procedure: subtraction operation can be changed to the addition operation if the sign of the
subtrahend is changed:
Overflow
• When two numbers of n digits each are added and the sum occupies n + 1 digits, we say
that an overflow occurred.
• An overflow is a problem in digital computers because the width of registers is finite. A
result that contains n + 1 bits cannot be accommodated in a register with a standard
length of n bits. For this reason, many computers detect the occurrence of an overflow,
and when it occurs, a corresponding flip-flop is set which can then be checked by the
user.
• The detection of an overflow after the addition of two binary numbers depends on
whether the numbers are considered to be signed or unsigned.
• When two unsigned numbers are added, an overflow is detected from the end carry out of
the most significant position.
• In the case of signed numbers, the leftmost bit always represents the sign, and negative numbers
are in 2's complement form. When two signed numbers are added, the sign bit is treated as part of
the number and the end carry does not indicate an overflow.
• An overflow cannot occur after an addition if one number is positive and the other is
negative, since adding a positive number to a negative number produces a result
that is smaller than the larger of the two original numbers.
• An overflow may occur if the two numbers added are both either positive or both
negative.
For example: two signed binary numbers +70 and +80 are stored in two 8-bit registers.

Since the sum of numbers 150 exceeds

the capacity of the resister (since 8-bit
register can store values ranging from
+127 to -127), hence the overflow.
Overflow Detection
• An overflow condition can be detected by observing two carries: carry into the
sign bit position and carry out of the sign bit position.
• Consider example of above 8-bit register, if we take the carry out of the sign bit
position as a sign bit of the result, 9-bit answer so obtained will be correct.
• Since answer can not be accommodated within 8-bits, we say that an overflow
occurred.
• If these two carries are equal ==> no overflow
• If these two carries are not same ==> overflow condition is produced.
• If two carries are applied to an exclusive-OR gate, an overflow will be detected
when output of the gate is equal to 1.
Decimal Representation
• We can normally represent decimal numbers in one of following two ways
- By converting into binary
- By using BCD codes
• By converting into binary
Advantage
• Arithmetic and logical calculation becomes easy. Negative numbers can be represented
easily.
Disadvantage
• At the time of input conversion from decimal to binary is needed and at the time of output
conversion from binary to decimal is needed.
• Therefore this approach is useful in the systems where there is much calculation than
input/output.
• By using BCD codes
Advantage : At the time of input conversion
from decimal to binary and at the time of
output conversion from binary to decimal is not
needed.
Disadvantage: Arithmetic and logical
calculation becomes difficult to do.
Representation of negative numbers is tricky.
Therefore, this approach is useful in the
systems where there is much input/output than
arithmetic and logical calculation
Alphanumeric Representation

• Alphanumeric character set is

a set of elements that includes
the 10 decimal digits, 26
letters of the alphabet and
special characters such as $,
%, + etc. The standard
alphanumeric binary code is
ASCII(American Standard
Code for Information
Interchange) which uses 7 bits
to code 128 characters (both
uppercase and lowercase
letters, decimal digits and
special characters).
Floating Point Representation
• The floating point representation of a number has two parts:
- The first part represents a signed fixed point number called Mantissa.
- The second part designates the position of decimal or binary point is called the
Exponent.
- The fixed point mantissa may be a fraction or an integer. For example: The
decimal number +6132.789 is represented in floating point with a fraction and an
exponent as follows:
Fraction Exponent
0.6132789 4
The value of the exponent indicates the actual position of the decimal point
is 4 position to the right of the indicated decimal point in the fraction.
• Floating point is represented by M*re
• Only the mantissa ‘M’ and the exponent ‘e’ are physically represented in the
register including their sign. The radix ‘r’ and the radix point position of the
Mantissa are always assumed.
• A floating point is said to be normalized if the MSB of the mantissa is non-zero.
Normalization
• A floating-point number is said to be normalized if the most significant digit of
the mantissa is nonzero. For example, decimal number 350 is normalized but
00035 is not.
Examples
1. 525.360 2. -000845.67
Solution: Solution:
Fraction Exponent Fraction Exponent
0.525360 3 -0.84567 3
M= 0.525360 M= -0.84567
e=3 e=3
M*re = 0.525360*103 M*re = -0.84567*103
Normalization = 5.25360 *102 Normalization = - 8.4567 *102
Examples
3. 0.000245
Solution:
Fraction Exponent
0.245 -3
M= 0.245
e=-3
M*re = 0.245*10-3
Normalization = 2.45 *10-4
 Convert decimal to binary : 8-bit word
1- bit 1- bit 3- bit 3- bit

Sign of a
number Sign of Exponent Mantissa
exponent (Always number after decimal)
Example:
Decimal (-13.9) into binary 8- bits
• Solution:

8-bit word
1 0 0 1 1 1 0 1
Single Precision Floating Point (32-bit)
• It is computer number format that occupies 4-bytes i.e. 32 bits in computer memory and represents
a wide dynamic range of values by using a floating point. Single Precision binary floating point is
used due to wider range over fixed point (of the same bit and width).
- Sign : 1- bit
- Exponent : 8-bits
- Significant precision = 24 bits (23 explicitly stored)
- Sign bit determined the sign of the number, which is the sign of the significand as well. Exponent
is either an 8-bit signed integer from -128 to +127 or an 8-bit unsigned integer from 0 to 255.
- The true significand includes 23 fraction bits to the right of the binary point.
1-bit 8-bit 23-bit
S E Mantissa

Sign Exponent Manitssa: normalized binary

bit Excess 127 binary integer added significand with a hidden integer
Actual exponent is: bit: 1.M
e= E -127
E = e + 127
Examples
1. Convert decimal (0.75)10 to 32- bit single precision format.
Solution:
0.75 * 2 = 1.5 1
0.5 * 2 = 1.0 1
(0.75)10 = (0.11)2
Normalized form = 1.1 * 2-1
The Mantissa is positive so S = 0
Exponent ( e) = -1
E = -1 +127 = 126 = 01111110
Fractional Part of Mantissa is
M = 10000000000000000000000
The Single Precision Format is 0 01111110 10000000000000000000000
2. (-2345.125)10
Solution:
2345 = 100100101001
0.125 * 2 = 0.25 - 0
0.25 * 2 = 0.5 -0
0.5 * 2 = 1 -1
(-2345.125)10 = (100100101001.001)2
Normalized form = 1.00100101001001* 211
The Mantissa is negative so S = 1
Exponent ( e) = 11
E = 11 +127 = 138 = 10001010
Fractional Part of Mantissa is
M = 00100101001001000000000 1 10001010 00100101001001000000000
The Single Precision Format is
(5.2)10
Solution:
5 = 101
0.2 * 2 = 0.4 - 0
0.4 * 2 = 0.8 - 0
0.8 * 2 = 1.6 - 1
0.6 * 2 = 1.2 -1
0.2 * 2 = 0.4 - 0 (repetition starts)
(5.2)10 = (101.0011)2
Normalized form = 1.010011 * 22
The Mantissa is positive so S = 0
Exponent ( e) = 2
E = 2 +127 = 129 = 10000001
Fractional Part of Mantissa is 0 10000001 01001100110011001100110
M = 01001100110011001100110
The Single Precision Format is
Double Precision Floating Point (64-bit)
• It consists of 1 sign bit for mantissa, 11 bit of exponent including sign bit and remaining
52 bits for mantissa data / fraction.
Value = N =(-1)S * 2E-1023 * (1.M)

1-bit 11-bit 52-bit

S E Mantissa

Sign Actual exponent is: Manitssa: normalized binary

bit e= E -1023 significand with a hidden integer
E = e + 1023 bit: 1.M
1.2 Other Binary Codes: Gray Code
• The reflected binary or Gray code is used to represent digital data converted from analog
information.
• Gray code changes by only one bit as it sequences from one number to the next.
• Gray codes are very useful in the normal sequence of binary numbers generated by the
hardware that may cause an error or ambiguity during the transition from one number to
the next.
• So, the Gray code can eliminate this problem easily since only one bit changes its value
during any transition between two numbers.
Convert Binary to Gray Code
• The MSB (Most Significant Bit) of the gray code will be exactly equal to the first bit of
the given binary number.
• The second bit of the code will be exclusive-or (XOR) of the first and second bit of the
given binary number, i.e if both the bits are same the result will be 0 and if they are
different the result will be 1.
• The third bit of gray code will be equal to the exclusive-or (XOR) of the second and third
bit of the given binary number. Thus the binary to gray code conversion goes on. An
example is given below to illustrate these steps.
Gray Code to Binary Conversion
• Gray code to binary conversion is again a very simple and easy process. Following
steps can make your idea clear on this type of conversions.
1.The MSB of the binary number will be equal to the MSB of the given gray code.
2.Now if the second gray bit is 0, then the second binary bit will be the same as the
previous or the first bit. If the gray bit is 1 the second binary bit will alter. If it was 1 it
will be 0 and if it was 0 it will be 1.
3.This step is continued for all the bits to do Gray code to binary conversion.
Converting Binary to Gray Code
Converting Gray to Binary
Excess 3 Code
• Excess-3 codes are unweighted and can be obtained by adding 3 to each decimal
digit then it can be represented by using 4 bit binary number for each digit. An
Excess-3 equivalent of a given binary number is obtained using the following
steps:
• Find the decimal equivalent of the given binary number.
• Add +3 to each digit of decimal number.
• Convert the newly obtained decimal number back to binary number to get
required excess-3 equivalent.
• You can add 0011 to each four-bit group in binary coded decimal number (BCD)
to get desired excess-3 equivalent.
Binary Codes
• Binary codes are codes which are characterized in binary system with alteration from the
original ones. Two types of it are the Weighted Binary Systems and Non Weighted Codes.
Weighted binary codes are those which follow the positional weighting principles wherein
each position of the number represents a specific weight. Like, 8421, 2421, and 5211 are
weighted binary codes. Non weighted codes are codes that are not placed weighted. It means
that each position within the binary number is not assigned a fixed value. Excess-3 and Gray
codes are examples of non-weighted binary codes.
Weighted Codes
• Weighted binary codes are those binary codes which obey the positional weight principle.
Each position of the number represents a specific weight. Several systems of the codes are
used to express the decimal digits 0 through 9. In these codes each decimal digit is
represented by a group of four bits.
8 4 2 1 code
•The weights of this code are 8, 4, 2 and 1.
•This code has all positive weights. So, it is a positively
weighted code.
•This code is also called as natural BCD Binary Coded
Decimal Binary Coded Decimal code.
2 4 2 1 code
•The weights of this code are 2, 4, 2 and 1.
•This code has all positive weights. So, it is
a positively weighted code.
•It is an unnatural BCD code. Sum of weights of
unnatural BCD codes is equal to 9.
•It is a self-complementing code. Self-complementing
codes provide the 9’s complement of a decimal
number, just by interchanging 1’s and 0’s in its
equivalent 2421 representation.
Self Complementing Codes:
• Self complementing binary codes are those who members complement on themselves. For
a binary code to become a self- complementing code, the following two conditions must
be satisfied:
1. The complement of a binary number should be obtained from that number by replacing
1’s with 0’s and 0’s with 1’s.
2. The sum of the binary number and its complement should be equal to decimal 9.
Example:
Excess-3 Code for 2 is 2+3 =5 = 0101
1’s complement of 0101 is 1010 - this is excess-3 code for decimal 7
9’s complement of 2 is : 9-2 =7
Which means 1’s complement of the coded number yields 9’s complement of number itself.
EBCDIC:
• EBCDIC is short for extended binary coded decimal interchange code is eight bits, or one
byte, wide. This is a coding system used to represent characters-letters, numerals,
punctuation marks, and other symbols in computerized text. A character is represented in
EBCDIC by eight bit.
• EBCDIC is different from, and incompatible with, the ASCII character set used by all
other computers. The EBCDIC code allows for 256 different characters. For personal
computers, however, ASCII is the standard.
1.3: Error Detection Codes
• Binary information transmitted through some form of communication medium is
subjected to external noise that could change bit from 1 to 0 and vice versa.
• An error detection code is binary code that detects error during transmission. The
detected errors cannot be corrected but their presence is indicated.
• The usual procedure is to observe the frequency of errors. If errors occur too often then
the system is checked for malfunctioning.
• Parity bit is used for detecting errors during transmission of binary information.
• A parity bit is an extra bit included with a binary message to make the total number of
1’s either even or odd.
• Even Parity:
One bit is attached to the information so that the total number of 1 bits is an even
numbers.
Example: 1011001 0
1010010 1
• Odd Parity:
One bit is attached to the information so that the total number of 1 bits is an odd
numbers.
Example: 1011001 1
1010010 0
• The circuit that generates the parity bit in the transmitter is called the parity generator
and the circuit that checks the parity bit in the receiver id called a parity checker.
• Parity generator and checker networks are logic circuits constructed with exclusive OR
functions.
• Consider a 3-bit message to be transmitted with an odd parity. At the sending end, the
odd parity is generated by a parity generator circuit. The output of the parity checker
would be one when an error occurs i.e. number of 1’s in the four inputs is even.
• Parity generator
• Parity Checker
Consider an original message as well as parity bit.
For even parity: do it on your own