EEET2506 Control Systems

Lecture 11 : Control Design – Root Locus

Approach
 References:

▪ Chapter 6, Modern Control Engineering

▪ Videos on Canvas

2
 Lecture Overview

• Gain Calculation from Root Locus plots

• Control System Design using Root Locus
Analysis methods
• Dynamic Compensation
• Examples

3
 Root Locus Fundamentals

• Recall – closed loop poles are the solutions to:

1+𝐺 𝑠 𝐻 𝑠 =0

• For a proportional controller:

1 + 𝐾𝑃 𝐺 𝑠 = 0

• The Root Locus are the solutions to this equation

as KP varies from 0 to 

• The Root Locus is therefore the solution to:

1 1
𝐺 𝑠 =− → 𝐺 𝑠 = ±180𝑜 ; 𝐺 𝑠 =
𝐾𝑃 𝐾𝑃

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 Gain Calculation

• Control system design requires a method for selecting

the controller gain Kp
• Root locus analysis determines the closed-loop pole
locations based on the phase of G(s), but the controller gain
Kp is not explicitly addressed
• Recall that the locus of closed loop poles satisfies:

1 + 𝐾𝑃 𝐺(𝑠) = 0

• We can rearrange this expression as:

1
𝐾𝑃 = −
𝐺(𝑠)
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 Gain Calculation

• Consider a rational transfer function of the form:

𝑠 − 𝑧𝑚 𝑠 − 𝑧𝑚−1 … (𝑠 − 𝑧2 )(𝑠 − 𝑧1 )
𝐺 𝑠 = 𝐾𝐷𝐶
𝑠 − 𝑝𝑛 𝑠 − 𝑝𝑛−1 … (𝑠 − 𝑝2 )(𝑠 − 𝑝1 )

• At an arbitrary test point so on the root locus, the controller

gain therefore satisfies:
1 1 𝑠0 − 𝑝𝑛 𝑠0 − 𝑝𝑛−1 … 𝑠0 − 𝑝2 𝑠0 − 𝑝1
𝐾𝑃 = =
𝐺(𝑠0 ) 𝐾𝐷𝐶 𝑠0 − 𝑧𝑚 𝑠0 − 𝑧𝑚−1 … 𝑠0 − 𝑧2 𝑠0 − 𝑧1

• Note that the magnitude function is a geometric distance

in the S-plane, e.g:
𝑠0 − 𝑝𝑛 = 𝑅𝑒(𝑠0 − 𝑝𝑛 ) 2 + (𝐼𝑚(𝑠0 − 𝑝𝑛 ))2
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 Gain Calculation – Example
1
• Consider the system: 𝐺 𝑠 =
𝑠(𝑠 2 + 8𝑠 + 32)

• With poles: p1 = 0, p2 = −4 + j4, p3 = −4 −j4

• From previous analysis we know that the loci branches

cross the j axis at: 𝜔𝑜 = 32; 𝐾𝑃 = 256

• Using the gain formula:

𝐾𝑃 = 𝑗 32 − 0 𝑗 32 − −4 + 𝑗4 𝑗 32 − −4 − 𝑗4

𝐾𝑃 = 5.66 ∗ 4.33 ∗ 10.45 = 256 As expected

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 Gain Calculation – Example

j - axis
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• This example can be |so- p2| so
5
illustrated graphically 4

• Gain calculation can 3

therefore be performed |so- p 3 |

2

|so- p 1| 1
using simple geometric
distance measures -5 -4 -3 -2 -1 -1
real - axis
-2
-3
-4
-5

-6

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 Design Specifications

• Design specifications are given in terms of steady

state and transient requirements:
• Steady state parameters:
– Position, Velocity, Acceleration error constants for
type 0,I and II systems
• Transient parameters
– Overshoot (MP) specifies 
– Rise time (tr) specifies o
– Settling time (ts) specifies o
• Base on these requirements we partition the S- plane
into acceptable and unacceptable regions 9
 Root Locus Design

• The transient specifications can be readily combined

with the root locus method
• Example – Design a controller for G(s) to meet the
following transient specifications:
– 25% overshoot or less
– 2.5s rise time
– 1% settling time of 10s

1
𝐺 𝑠 =
𝑠(𝑠 + 1)

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 Root Locus Design

• The transient specifications can be translated into S-plane

requirements:

𝑙𝑛2 (𝑀𝑃 )
=
𝜋 2 + 𝑙𝑛2 (𝑀𝑃 )

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 Root Locus Design

Design Requirements in the S-Plane

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 Root Locus Design

Design Requirements and System Root Locus

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 Root Locus Design

• The design can be realised with a simple proportional

gain controller
• The target closed-loop poles can be selected as:

𝑠1,2 = −0.5 ± 𝑗1.133

• The controller gain at these locations is:

𝐾𝑃 = −0.5 + 1 2 + 1.3332 −0.5 2 + 1.3332 = 2.02

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 Root Locus Design

Closed Loop Step Response

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 Dynamic Compensation

• More typically it is not possible to achieve the design

requirements via gain adjustment only
• It is necessary to re-shape the locus branches using
dynamic compensation 𝑠−𝑧
𝐷 𝑠 =
• Two forms:
𝑠−𝑝
Lead: z < p
Lag: z > p
• Lead compensation acts to lower the transient rise
time and decrease overshoot
• Lag compensation is used to improve the steady state
accuracy of the system
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 Dynamic Compensation

• Examine the controller design for the above example

plant G(s), but with more stringent transient
specifications:
• 5% overshoot or less
• 1.5s rise time
• 1% settling time of 5s

• Where:
1
𝐺 𝑠 =
𝑠(𝑠 + 1)

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 Dynamic Compensation

• The transient specifications can be translated into S-plane

requirements:

𝑙𝑛2 (𝑀𝑃 )
= 2 2
= 0.7
𝜋 + 𝑙𝑛 (𝑀𝑃 )

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 Dynamic Compensation
Design Requirements and Uncompensated Root Locus

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 Dynamic Compensation

• The root locus shows that simple gain adjustment will

not meet the requirements
• We can identify two pole locations that should comply with
the requirements:
s1,2 = −1.5 j1.58
• The transfer function phase at s1 is:
𝐺 𝑠1 = −1 − 2

𝑜 −1
1.5 𝑜 −1
0.5
= − 90 + 𝑡𝑎𝑛 − 90 + 𝑡𝑎𝑛 = −241.07𝑜
1.58 1.58

• For this point to lie on the root locus we therefore need

an additional 61.070 of phase ‘lead’ 20
 Dynamic Compensation
• With a lead compensator network, the low frequency
zero increases the transfer function phase, while the
high frequency pole decreases it.

• Assumed zero is at s=-2, the phase introduced by

the zero is:
1.58
𝐷 𝑠1 |𝑧=−2 = 𝑡𝑎𝑛−1 = 72.4𝑜
−1.5+2

• The pole must not decrease the transfer function

phase by more than:
𝐷 𝑠1 |𝑝 ≤ 72.4𝑜 − 61.07𝑜 = 11.33𝑜
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 Dynamic Compensation

• This can be achieved with:

1.58
𝑝 = −1.5 − 𝑜
= −9.386
𝑡𝑎𝑛 11.33
• If we choose:
𝑠+2
𝐷 𝑠 =
𝑠 + 10

• The required controller gain at s1,s2 is:

1.52 + 1.582 (1.5 − 1)2 +1.582 (10 − 1.5)2 +1.582

𝐾𝑃 =
(2 − 1.5)2 +1.582
𝐾𝑃 = 18.86 22
 Dynamic Compensation
Design Requirements and Compensated Root Locus

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Dynamic Compensation
Closed Loop Step Response

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 Dynamic Compensation

• The rise time and settling time response requirements

have been achieved, but the overshoot is double the
design requirement
• This is due to the compensator zero, which behaves
as an approximate differentiator
• To allow for this it is often necessary to use an iterative
design approach (zero can be selected to cancel the
open loop pole)
• Note : The ratio of the zero and the pole in a
compensator should not exceed a ratio of 10:1 to allow
for a practical realisation

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 Lag compensation

• If the steady state requirements have not been met, then

a lag compensator can be used:
𝑠 − 𝑧𝑙𝑎𝑔
𝐷𝑙𝑎𝑔 𝑠 = 𝑧𝑙𝑎𝑔 > 𝑝𝑙𝑎𝑔
𝑠 − 𝑝𝑙𝑎𝑔

• This network introduces additional low frequency gain,

such that the error constants take the form:
𝑧𝑙𝑎𝑔
𝐸𝑘 = lim 𝑠 𝑘 𝐾𝑃 𝐷 𝑠 𝐺(𝑠) = 𝐾𝑃 lim 𝑠 𝑘 𝐺(𝑠)
𝑠→0 𝑝𝑙𝑎𝑔 𝑠→0

• If zlag and plag are smaller than the dominant poles the
effect on the overall root-locus is small
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 General Design Method

• STEP 1 : Using the design specifications, identify the

acceptable regions in the S-plane
• STEP 2 : Draw the root locus of the system, and
determine whether it is possible to meet the design
requirements using simple gain adjustment
• STEP 3 : If not, identify the desired locations (so) of the
closed loop poles in order to meet the design specifications
• STEP 4 : Determine the transfer function phase at the
closed loop pole locations (so)
• STEP 5 : Determine the required phase lead to force the loci
branches through the points (so)
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 General Design Method
𝑠−𝑧
• Choose: 𝐷𝑙𝑒𝑎𝑑 𝑠 = ; 𝑧 < 𝑝; 𝐺 𝑠0 + 𝐷𝑙𝑒𝑎𝑑 𝑠0 = 180𝑜
𝑠−𝑝
• STEP 6 : Determine the controller gain at (so) using:
1 1 𝑠0 − 𝑝𝑛 𝑠0 − 𝑝𝑛−1 … 𝑠0 − 𝑝2 𝑠0 − 𝑧𝑝
𝐾𝑃 = =
𝐺(𝑠0 ) 𝐾𝐷𝐶 𝑠0 − 𝑧𝑚 𝑠0 − 𝑧𝑚−1 … 𝑠0 − 𝑧2 𝑠0 − 𝑧1
• STEP 7 : Determine whether the steady state performance
is acceptable (i.e. position or velocity error). If not, insert a
lag compensator:
𝑠−𝑧
𝐷𝑙𝑎𝑔 𝑠 = ; 𝑧 > 𝑝;
𝑠−𝑝
For z, p << dominant pole (ten times smaller)
𝑘
𝑧𝑙𝑎𝑔
𝐸𝑘 = lim 𝑠 𝐾𝑃 𝐷 𝑠 𝐺(𝑠) = 𝐾𝑃 lim 𝑠 𝑘 𝐺(𝑠) 28
𝑠→0 𝑝𝑙𝑎𝑔 𝑠→0
 General Design Method

• To ensure that the steady state specifications have

been met with the desired transient behaviour
• If the lag compensator pole and zero are very close to
zero, this will introduce a closed loop pole with a slow
time constant
To mitigate this effect, ensure that the lag network is
placed at as high a frequency as possible
• Note that the ratios of the poles and zeros within the lead
and lag compensator should not exceed the ratio of 10
• If more phase lead or lag is required it is possible to use
cascaded compensation networks
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