Question 1:

When we want to transfer data from the keyboard to the attached computer, which mode
of transfer is mostly preferred?
a) Programmed I/O
b) Direct memory access
c) Hardware interrupt-driven I/O
d) Software interrupt-driven I/O
Answer: c) Hardware interrupt-driven I/O

Question 2:

When we want to transfer data from the hard disk to the attached computer on a page
fault, which mode of transfer is mostly preferred?
a) Hardware interrupt-driven I/O
b) Software interrupt-driven I/O
c) Direct memory access
d) Programmed I/O
Answer: c) Direct memory access

Question 3:

What is Data Link Escape (DLE) character used to indicate in character-oriented data
transfer protocol?
a) Control character
b) End of transfer
c) A control character
d) Start of transfer
Answer: c) A control character

Question 4:

A typical I/O bus used with a computer is synchronous and...

a) Asynchronous and proprietary
b) Asynchronous and standard
c) Synchronous and proprietary
d) Synchronous and standard
Answer: d) Synchronous and standard

Question 5:

In which of the following, the interrupting device provides the address of the interrupt
service routine (ISR)?
a) Hardware interrupt
b) Software interrupt
c) Vectored interrupt
d) Daisy chaining
Answer: c) Vectored interrupt

Question 6:

Analyze: The CPU clock speed refers to the number of...

a) CPUs it has
b) RAMs it has
c) Clock it has
d) Number of cycles CPU executes per second
Answer: d) Number of cycles CPU executes per second

Question 7:

Which of the following memory has the highest access speed?

a) Hard disk
b) RAM
c) ROM
d) Cache memory
Answer: d) Cache memory

Question 8:

For a 2K x 16 memory system that uses a decoder to select a word, the total number of
external connections to the memory system (including address, data, control, and power
signals) will be at least...
a) 24
b) 31
c) 28
d) 30
Answer: d) 30

Question 9:

A memory system of size 16 K bytes is to be designed using memory chips which have 12
address lines and 4 data lines each. The number of such chips required to design the
memory system is...
a) 2
b) 4
c) 6
d) 8
Answer: d) 8

Question 10:
Analyze: Which memory improves the speed of execution of a program?
a) Primary
b) Cache
c) Secondary
d) Virtual
Answer: b) Cache

I'll now continue processing the remaining questions.

Continuing with Questions 11–20:

Question 11:

In which of the following addressing modes, the operand value is directly specified?
a) Indirect
b) Direct
c) Immediate
d) Register direct
Answer: c) Immediate

Question 12:

When an instruction is required to be brought from memory to CPU, which one of the
following buses are fetched?
a) Data Bus
b) Address Bus
c) Control Bus
d) Peripheral Bus
Answer: a) Data Bus

Question 13:

Identify which one of the following is not a data transfer instruction:

a) Load
b) Clear
c) Move
d) Store
Answer: b) Clear

Question 14:

The control unit of the computer system is designed to go through which of the following
instruction cycle phases?
a) Fetch
b) Decode
c) Execute
d) All of the above
Answer: d) All of the above

Question 15:

The function of the program counter (PC), which holds the...

a) Temporary data
b) Address of the next instruction
c) Memory operand
d) Address of memory
Answer: b) Address of the next instruction

Question 16:

Identify the incorrect statement with respect to cache memory:

a) Temporal locality takes into account the number of times of execution of an instruction.
b) The spatial locality takes into account the loading of neighboring variables.
c) The contents loaded into cache cannot be overwritten exclusively.
d) The cache memory uses shorter address space as compared to main memory.
Answer: c) The contents loaded into cache cannot be overwritten exclusively.

Question 17:

The drawback of building a large memory with DRAM is...

a) The large cost factor
b) The inefficient memory organization
c) Slow speed of operation
d) All of the mentioned
Answer: d) All of the mentioned

Question 18:

Classify: The fastest data access is provided using...

a) Cache
b) DRAM
c) SRAM
d) Registers
Answer: a) Cache

Question 19:
The memory which is used to store the copy of data or instructions stored in larger
memories inside the CPU is called...
a) Level 1 Cache
b) Level 2 Cache
c) Register
d) TLB
Answer: a) Level 1 Cache

Question 20:

Illustrate: The program is divided into operable parts called as...

a) Frames
b) Segments
c) Pages
d) Sheets
Answer: c) Pages

Let me know if you'd like me to proceed with the remaining questions or refine any of these!

4o

You said:

Yes continue till 47

ChatGPT said:

ChatGPT

Questions 21–30:

Question 21:

All operations using one-address instructions are done between...

a) Memory and processor registers
b) Accumulator and processor registers
c) Accumulator and memory operand
d) Stack pointer and memory operand
Answer: c) Accumulator and memory operand

Question 22:

Which of the following stores operation during execution and result of operation after
execution?
a) General purpose registers
b) Accumulator
c) Flag register
d) Stack register
Answer: b) Accumulator

Question 23:

Addressing mode in which the address field of an instruction specifies a register in the
CPU, whose contents give the address of the operand in memory, is called...
a) Direct addressing mode
b) Indirect addressing mode
c) Relative addressing mode
d) Register addressing mode
Answer: b) Indirect addressing mode

Question 24:

Address of stored data is not defined in the given instruction in...

a) Direct addressing mode
b) Indirect addressing mode
c) Register addressing mode
d) Implicit addressing mode
Answer: d) Implicit addressing mode

Question 25:

Which of the following is used to store the address of memory from which data is collected
and sent to the CPU?
a) Program counter
b) Memory Address Register (MAR)
c) Cache memory
d) DMA
Answer: b) Memory Address Register (MAR)

Question 26:

Recognize: What does "coupling of processors" refer to?

a) The synchronization of CPU clock speeds
b) The interconnection of multiple processors to work together
c) The integration of memory and CPU in a single chip
d) The physical connection of processors to the motherboard
Answer: b) The interconnection of multiple processors to work together

Question 27:
Recognize the term which refers to the situation in which multiple processors
simultaneously attempt to access and modify the same memory location, leading to data
inconsistency.
a) Bus Contention
b) Processor affinity
c) Memory contention
d) Cache coherence
Answer: c) Memory contention

Question 28:

Recognize the key advantage in Booth's Algorithm for binary multiplication compared to
traditional methods.
a) Faster addition
b) Reduced number of operations
c) Improved division
d) Enhanced exponentiation
Answer: b) Reduced number of operations

Question 29:

In binary division, what operation is performed repeatedly to calculate the quotient?

a) Bitwise OR
b) Bitwise AND
c) Subtraction
d) Addition
Answer: c) Subtraction

Question 30:

Which of the following statements is false?

a) The main motivation for using cache memory is to increase the effective speed of the
memory system.
b) The main objective for using virtual memory is to increase the effective capacity of the
memory system.
c) The size of main memory is larger as compared to cache memory. Main memory is faster as
compared to cache memory.
d) Main memory is faster as compared to cache memory.
Answer: d) Main memory is faster as compared to cache memory.

Questions 31–40:

Question 31:
Analyze: The techniques which move the program blocks to or from physical memory is
called as...
a) Paging
b) Virtual memory organization
c) Overlays
d) Framing
Answer: a) Paging

Question 32:

Classify: The binary address issued to data or instructions are called as...
a) Physical address
b) Location address
c) Relocatable address
d) Logical address
Answer: d) Logical address

Question 33:

Classify: Which is used to implement virtual memory organization?

a) Page table
b) Frame table
c) MMU
d) None
Answer: c) MMU

Question 34:

Identify: The main aim of virtual memory organization is...

a) To provide effective memory access
b) To provide better memory transfer
c) To improve the execution of the program
d) All of the above
Answer: d) All of the above

Question 35:

How is set-associative mapping different from direct mapping?

a) It uses a single tag to store the corresponding data on index
b) Direct mapping uses increment registers to match the addresses
c) It uses two tags against a single index
d) Direct mapping is very expensive
Answer: c) It uses two tags against a single index
Question 36:

Memory-mapped I/O has...

a) Increased addressing memory due to memory-mapped I/O
b) Decreased addressing memory due to memory-mapped I/O
c) Separate control line
d) None of the above
Answer: b) Decreased addressing memory due to memory-mapped I/O

Question 37:

Recognize: Which multiplication algorithm is known for its optimization of runs of 0s and
1s in the multiplier?
a) Non-Restoring Division
b) Long Division
c) Booth’s Algorithm
d) Shift-and-Add
Answer: c) Booth’s Algorithm

Question 38:

State: Which arithmetic operation is typically used to implement subtraction in a

computer's hardware?
a) Binary division
b) Two’s complement subtraction
c) Binary addition
d) Binary multiplication
Answer: b) Two’s complement subtraction

Question 39:

What is the result of adding the binary numbers 1101 and 1011?
a) 1110
b) 10100
c) 10110
d) 11000
Answer: b) 10100

Question 40:

Which of the micro-operations is correctly labeled (Move the content of R2 register to R1

register)?
a) R1 -> R2
b) R1 <- R2
c) R1 = R2
d) R1 > R2
Answer: b) R1 <- R2

Proceeding with the remaining 41–47 questions.

Questions 41–47:

Question 41:

Recognize the type of shift operation that shifts all bits to the left, inserting 0 into the least
significant bit position:
a) Arithmetic Shift
b) Logical Shift Left
c) Logical Shift Right
d) Circular Shift
Answer: b) Logical Shift Left

Question 42:

In the CPU instruction cycle, which step is responsible for interpreting the opcode and
determining the required operation?
a) Fetch
b) Decode
c) Execute
d) Write-back
Answer: b) Decode

Question 43:

Which of the following control signals is used to write data into a memory location?
a) Read
b) Write
c) Enable
d) Address
Answer: b) Write

Question 44:

The term that refers to the number of memory locations that can be directly addressed by a
microprocessor is called...
a) Memory Mapping
b) Address Range
c) Address Space
d) Memory Space
Answer: c) Address Space

Question 45:

Which one of the following is NOT an interrupt classification?

a) Hardware Interrupt
b) Software Interrupt
c) Vector Interrupt
d) Buffer Interrupt
Answer: d) Buffer Interrupt

Question 46:

During the fetch stage of the instruction cycle, what is placed into the instruction register?
a) Data
b) Opcode
c) Instruction
d) Address
Answer: c) Instruction

Question 47:

What mechanism allows a CPU to handle multiple interrupt requests simultaneously?

a) Interrupt masking
b) Polling
c) Interrupt prioritization
d) Bus arbitration
Answer: c) Interrupt prioritization

This concludes the answers for questions 11 through 47. Let me know if you need clarification
or further assistance!

4o

You said:
Tell me answer of this page too and with question and option

ChatGPT said:

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Here are the answers for the questions from the image:

Question 48:

In which of the following mechanisms, the address of the interrupt service routine is
provided by interrupting device?
a) Software interrupt
b) Priority interrupt
c) Vectored interrupt
d) Hardware interrupt
Answer: c) Vectored interrupt

Question 49:

Identify the incorrect statement with respect to auxiliary memory:

a) It has a large capacity
b) It is inexpensive in cost
c) It is used in RAM construction
d) It often serves as an option for backup services
Answer: c) It is used in RAM construction

Question 50:

The interrupt enable flip-flop IEN can be set or cleared which of the following:
a) Program instructions
b) Interrupt service
c) ALU
d) DMA
Answer: b) Interrupt service

Question 51:

How many 24 decoders are needed in order to make 416 line decoders?
a) 5
b) 6
c) 3
d) 2
Answer: c) 3
Question 52:

What is the number of data inputs in 4×1 multiplexers?

a) 0 to 4
b) 0 to 8
c) 1 to 8
d) 0 to 7
Answer: d) 0 to 7

Question 53:

Register R has value 11011101. Determine the sequence after logical shift left?
a) 10111010
b) 11101110
c) 01101110
d) 10000100
Answer: d) 10000100

Question 54:

Register R has value 11011101. Determine the sequence after circular shift right?
a) 01011100
b) 00101110
c) 01101101
d) 11101110
Answer: c) 01101101

Question 55:

A common bus system has 16 registers of 32-bit each. How many multiplexers are there in
the bus?
a) 16
b) 32
c) 20
d) 12
Answer: b) 32

Question 56:

A shift register is defined as:

a) The register capable of shifting an information to another register
b) The register capable of shifting an information either to the right or to the left
c) The register capable of shifting an information to the right only
d) The register capable of shifting an information to the left only
Answer: b) The register capable of shifting an information either to the right or to the left
Question 57:

What is the relationship between Input Output Processor and Direct Memory Access?
a) Many computers combine the interface logic with the requirements for direct memory access
into one unit and call it an I/O processor
b) DMA transfers are used to implement the logic of direct memory access without using I/O
processor
c) Transfer of data under programmed I/O is between CPU and Memory
d) Transfer of data under programmed I/O is between CPU and ALU
Answer: a) Many computers combine the interface logic with the requirements for direct
memory access into one unit and call it an I/O processor

Question 58:

If while running an instruction the following information is supplied, opcode=111, I=0 what
will be the type of instruction?
a) Memory reference instructions
b) Register reference instructions
c) Input-Output instructions
d) Interrupt instructions
Answer: b) Register reference instructions

Question 59:

Which statement is true for priority interrupt in a system?

a) It is a system that establishes a priority over the various sources to determine which
condition is to be serviced first
b) It is a system that establishes a priority over the various sources to determine which
condition is to be serviced in the second and later
c) It is a system that establishes a priority over the various sources to determine which
condition is to be serviced in the last
d) All options are correct
Answer: a) It is a system that establishes a priority over the various sources to determine
which condition is to be serviced first

Question 60:

Which statement is true for Daisy chaining priority interrupt in a system?

a) The device with the highest priority is placed in the last position, followed by lower-priority
devices
b) The device with the highest priority is placed in the first position, followed by lower-priority
devices
c) The device with the lowest priority is placed in the first position, followed by lower-priority
devices
d) It does prioritize the devices according to the rank order
Answer: b) The device with the highest priority is placed in the first position, followed by
lower-priority devices