Sharma 2015
Sharma 2015
I. I NTRODUCTION
Fig. 1: GaN HEMT structure with a gate field plate. The source to gate length LSG =
GaN High Electron Mobility Transistors (HEMTs) have 2μm and gate to drain length LDG = 3μm. The gate field plate length, LGF P =
0.5μm.
drawn unprecedented attention in industry due to their promis-
ing candidature in high frequency and high power applications
[1, 2]. They enjoy several interesting features of III-nitride
efforts have been made to study the C-V characteristics of
system, such as wide bandgap, high 2-DEG charge density,
GaN HEMTs [11] including the effect of field plates [12].
high electron mobility, high breakdown voltage (VBR ) and
Jung et. al. have proposed a model to show the characteristics
excellent thermal conductivity [3–7].
of output capacitance for different field plate sizes and gate
The incorporation of field plate (FP) in GaN HEMTs further
to drain distance [13]. Previously, even we have reported a
increase its VBR [8, 9], which can be maximized with proper
surface-potential based compact model for the capacitance
optimization of FP length and its insulator thickness [10]. FP
of AlGaN/GaN HEMTs with field plates [14], for our ASM
also reduces the gate leakage and improves linearity, stability,
HEMT model [15–22]. However, the physical explanation for
reliability and efficiency of the device. The capacitive nature
the capacitance behavior needs more attention.
of a GaN HEMT is also affected by the presence of a FP.
In this paper, we discuss the variation in trends of the Gate-
Addition of FP leads to an increase in the device capacitance
to-source capacitance (CGS ) and Gate-to-drain capacitance
which in turn degrades the device switching characteristics.
(CGD ) with the bias, gate-source voltage (VGS ). TCAD simu-
The gap in GaN HEMTs from the gate edge to the
lations have been carried on a Field Plated GaN HEMT and the
drain/source contact is called the access region. It is found that
physical reasons behind its C−V behavior, for different access
quasi-saturation of the electron velocity occurs in the access
region lengths (LDG ) and gate field plate length (LGF P ) have
regions and effectively, these regions behave like a nonlinear
been analyzed.
resistor. This access region resistance limits the maximum
attainable output current (IDS ) of the device [18]. Also, the The paper is organized as follows: The device structure
change in the access region length and hence the access region under consideration is given in section II and our analysis
resistance has a pronounced effect on the capacitance voltage is presented in section III. We conclude the paper in section
characteristics of GaN HEMTs. IV.
In such a scenario, the study of C − V behavior of a
II. D EVICE S TRUCTURE
field plated GaN HEMT becomes utmost important with the
view of understanding the high frequency performance and In order to analyze various physical quantities so as to get a
switching characteristics of such high power devices. This better understanding of the C −V behavior, TCAD simulations
lays the motivation behind our work. In literature, special are performed on a layered structure consisting of a 25nm
978-1-4799-8364-3/15/$31.00 2015
c IEEE 499
Fig. 2: CGD as a function of gate voltage for different drain side access region lengths
(LDG ). LSG = 2μm, LGF P = 0.5μm and LG = 2μm.
Fig. 4: Intrinsic drain voltage (VK ) vs VGS for different Gate to Drain lengths.
(a)
Fig. 5: CGS as a function of gate voltage for different drain side access region lengths
(LDG ). LSG = 2μm, LGF P = 0.5μm and LG = 2μm.
500 2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)
∂Qg (VG , VK , VS ) ∂Qg (VG , VK , VS ) dVK dVK
CGS = − − = CGS(HEM T ) + CGD(HEM T ) (1)
∂VS ∂VK dVS dVS
2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) 501
IV. C ONCLUSION nique for RF-Based AlGaN/GaN HEMTs With a Source-
TCAD simulations have been performed and the physical Connected Air-Bridge Field Plate,” IEEE Electron Device
effects causing the unique behavior in C-V characteristics for Lett., vol. 33, no. 5, pp. 670, 672, May 2012.
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with increase in gate field plate length has been discussed. [14] S. A. Ahsan, S. Ghosh, K. Sharma, A. Dasgupta, S.
Khandelwal, and Y. S. Chauhan, “Capacitance Modeling
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502 2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)