Data Acquisition

Analog signal
• Continuous both in amplitude and time and can assume an
infinite number of different values – infinite resolution

Sensor
 Analog music recording
• Late 1980’s, early 90s
 Digital signal
• Signal is represented as two values (“low” and “high”), with
distinct voltage levels
 Bit and byte
• A digital signal can represent either a state of a quantity (bit)
or be an element of a unit of information (byte)
1 0 Possible values
5V
Bit 2

0V

1 0 1 0 0 0 1 1
Byte 5V
(composed 2N
of N bits)
0V
 Analog – digital conversion
• The digital signal is:
- Less perturbed by noise
- Easier to process, transmit or store
• Signal is often converted between analog – digital forms
- Music playback, generation of analog voltages using computer-
controlled instruments etc.
• AD and DA converters
Analog signal Digital signal
V
V

t t
 Sampling
Ideal sampling
Analog signal 
V xs (t)  x(t)  (t  kTs )
k 

t Ts t
Sampling with sample and hold
f s  1 sampling frequency
Ts

Ts t
 Sampling
• Before the conversion, the analog signal is sampled
• The signal to be sampled is multiplied with a pulse train signal

What is the best choice for the sampling frequency?

 Reminder: frequency spectrum
• Sinusoidal signals

Time domain
Frequency domain
A
1
fo   1kHz
To
To=1ms
1
+ B
Amplitude f1   1.5kHz
T1
A B
T1=0.67ms
2 2
u u  Asin( t)  B sin( t)
To T1
fo f1
= Frequency
 Representation
• Periodic signal
X( f )
Signal FFT x(t)
A
 = 2f
-A

fo 3fo 5fo


x(t)  A sin  ot 
4 sin 3ot sin 5ot
  ... 
 3 5 
• Non-periodic signal
M(f)

fmax
 Reconstruction of a square signal
1.0
1.0

0.5
0.5

2 4 6 8 10 2 4 6 8 10


0.5
0.5


1.0
1.0

decomposition reconstruction

1.0

0.5

2 4 6 8 10

0.5

1.0
 Multiplication operation
• Product:
cos 2f1t  cos 2f 2t   cos(2( f 2  f1 )t)  cos 2( f 2  f1 )t / 2

f2 − f1 f2+f1

f1 f2

Signal A Signal B Signal A × B

M( f )
FFT

× =
f0 − fmax f0 + fmax
f0
fmax
f = fmax bandwidth, periodic signal
continuous signal m(t)
 Sampling of a periodic signal
Time domain Frequency domain
x(t)  A sin1t 1
f1 
2
1

-1 f
0 5 10 15 20 25 30 f1
time, s
× ×
(t  kTs )
f
Ts  1 fs 2fs 3fs
1 = fs
fs
= 2fs 3fs
0

-1
0 5 10 15 20 25 30 f1 fs-f1 fs+f1 2fs-f1 2fs+f1
Sampling period, 0.2s
 Sampling of an arbitrary signal
Time domain Frequency domain
1

-1 f
0 5 10 15 20 25 30
time, s fmax

× ×

f
fs 2fs 3fs

1 = =
0

-1
0 5 10 15 20 25 30 fmax fs−fmax fs+fmax
time, s
Choice of the sampling frequency

Analog signal

Good sampling

Bad sampling

20
Example: sinusoidal signal, frequency f0
Original signal + sampling points Recovered signal

fs=f0

fs = 4f0/3

fs = 2f0

fs>2f0
Example: fixed sampling frequency
Good sampling Bad sampling

Original
signal

Sampled
signal

Reconstructed
signal
 Nyquist - Shannon theorem of sampling
f s  2 fmax
1

f -1
0 5 10 15 20 25 30
fmax time, s
×

f
fs 2fs 3fs

Reconstruction filter
1

-1
fmax 0 5 10 15 20 25 30
fs>2f max time, s

In practice fs several times larger then fmax

 Spectral folding
Good fs Bad fs

f f
fmax fmax

f f
fs 2fs fs 2fs

f
fs / 2 fs 2fs

Distorted signal
f
fs 2fs
 Antialiasing filter
Without filter With filter

Antialiasing filter
Perturbation
fmax f fmax f

fs 2fs f fs 2fs f
Reconstruction filter Reconstruction filter

fs / 2 f fs/2 f

f f
Analog Antialising
A/D Eliminates unwanted frequencies
signal filter
(< fs / 2 ) before sampling
 Bloc diagram for sampling
Original signal
Perfectly recovered
original signal

TTes t
t

t
faa < fs/2
× fmax

Antialiasing Reconstruction
filter filter

Ts  1
fs
 Decimal – binary number conversion
• Decimal system
123410 = (1  103) + (2  102) + (3  101) + (4  100)
• Binary system
11012 = (1  23) + (1  22) + (0  21) + (1  20)

Conversion binary -> decimal

110102 = (1  24) + (1  23) + (0  22) + (1  21) + (0  20)
= 16 + 8 + 0 + 2 + 0
= 2610
 Conversion decimal -> binary number
• Decimal to binary number
2610 quotient remainder
26
2 13 0
2 6 1
2 3 0
2 1 1
2 0 1
read the number from starting from
the last digit
=11010
 Encoding
Continuously
Digital form
changing A D
(binary code)
variable
3 00112=0×23+0×22+1×21+1×20=
=2+1=310

Conversion of a decimal number Ndec into a binary code

Ndec a1a2a3…an-1an

n
N dec   ai 2 ni  a1 2 n1  a2 2 n2  an 1 21  an 2 0 a1 MSB – most significant bit
i1
an LSB – least significant bit
 2n a121  a 2 22  a n 2n 
n
2 n
a 2 i
i

i1
 Quantisation
ADC value (analog to digital
UD UD
Encoded Ndec  2n  converter output value) –
signal ranges from 0 to 2n
FS
n: number of bits

code(Ndec ) : a1a2a3...an1an

Analog signal Uin

UD Example: n=3 bit
FS
q: quantum FS: full scale 111
110

code
101
FS
q 100
011
2n 010
001 Uin
000
0 1 2 3 4 5 6 7 FS
8 8 8 8 8 8 8 8
 Example
• Convert 4.5V with an 8-bit AD converter with a FS = 5V
4.5
N dec  256   230  (11100110) 2
5
5
Resolution   0.019V
256

• Convert an ADC value of 156 to volts (8 bit converter and FS = 5V)

Ndec 156
U D  n FS  5  3.0469V Uin  3.0469  0.0098V
2 256
 Quantisation error
UD Encoded
signal
Quantisation error = U D U in

N dec
 n FS U in
2
Analog signal
Uin
FS

0.5  FS q
error Max quantisation error =  n

2 2
q/2

-q/2
 Quantisation error as noise
UD Encoded
signal Power of the noise associated
with the quantisation error (R=1Ω)

2
q/2 
T Ts /2
1 u2 2
Pn 
T 0
n (t)dt 
Ts   t  dt 
 Ts / 2 
0
Analog signal Ts /2
Uin
2 q t 2 3
2q 2 Ts3 q 2
  3 
Ts Ts2  3  0
FS
Ts 24 12
error

q/2

-q/2
 Resolution
• The smallest detectable variation of the input
MSB 1
Resolution  FS  q
u n bits 2n
A/D … Digital output

LSB 111 n=3

FS 110

101
Example:
FS=5V, n=4 100

011
resolution = 5V/24 = 0.31V
010
Resolution
001

000
0/8 1/8 2/8 3/8 4/8 5/8 6/8 7/8 FS
 Example
• Convert 4.5V with an 8-bit AD converter with a FS = 5V
4.5
N dec  256   230  (11100110) 2
5
230
Error  5  4.5  4.4922  4.5  0.0078V
256
0.5 5
Max error=  0.0098V
256
5
Resolution   0.019V
256
• Convert a ADC value of 156 to volts (8 bit converter and FS = 5V)
Ndec 156
UD  n
FS  5  3.0469V Uin  3.0469  0.0098V
2 256
 Example: 12 bit converter
FS Resolution
1 FS
Resolution  12 FS 
2 4096
 Digital/Analog (D/A) Converter
MSB

Ndec
n bits 
…

D/A U D/ A n
FS
2
LSB

FS 7/8FS

6/8FS n=3

Analog output
5/8FS
Ex. FS = 5V, n =4 , code= 1111:
4/8FS

N dec  15 3/8FS

2/8FS

U D/ A  154  5  4.69V 1/8FS

Resolution=1 bit
2 0FS
000 001 010 011 100 101 110 111
D/A converter: binary weighted ladder
code(Ndec ) : a1a2a3...an1an
• Each input resistor is
twice the value of the
previous one
• Inputs are weighted
according to their
resistors
 D/A converter: binary weighted ladder
Vout  IR f 
aV aV
 1 ref  2 ref
a V anVref 
 R f   3 ref  n-1

 R 2R 4R 2 R
MSB LSB

for Rf = R/2:
 a1  a2  a3  an 
 Vref 
2 n 
Vout
2 4 8
code(Ndec ) : a1a2a3...an1an
D/A converter: binary weighted ladder
Major disadvantage:
- needs a large range of resistors with
high precision (2048:1 for 12-bit DAC)
- this limits it to 4-8 bit in practice
 R-2R resistor ladder

-only two resistor values (R and 2R)

-does not require high precision resistors
R-2R resistor ladder

V3  1 V2
2

likewise:
V2  1 V1
2

V1  Vref
1
2
Vout  IR
R-2R resistor ladder

V3  1 V2
2

likewise:
V2  1 V1
2

V1  Vref
1
2
Vout  IR
 R-2R resistor ladder

likewise:
V2  1 V1
2
1 1 1 1
V3  Vref , V3  Vref , V1  Vref V1  Vref
8 4 2 2

 a1  a2  a3  a4  Vout  IR
Vout  Vref  
 2 4 8 16 
 Successive approximation ADC
• Basic elements
- digital to analog converter
- analog comparator
- control logic module
- register

conversion time = n/f0

 Successive approximation ADC
Vref=10V

oscillator

conversion

ADC reading

conversion time = n/f0

 Sample and hold (SH) circuits
• used in the input stage of A/D converters
• captures the voltage of a varying analog signal and keeps it at a constant level
during the sampling time x(t)

xout(t)
x(t) xout(t)

discharge
(through the capacitor)

xe(t)
x(t)
 Example
• We would like to convert a sinusoidal signal with the frequency f using a
successive approximation converter with n bits and clock frequency fo. Calculate a
frequency above which we need to use an S/H circuit (n=12, fo=1MHz)
- Conversion time tc= n/fo
- u(t)=Ûcos(2ft)
Criterium : change of u(t) during tc ≤ less than the quantization error
a smaller change of signal would not change the digitization

1 FS
u(t) max 
2 2n
du(t) du(t)
u(t) max  t  t c  2fUˆ max tc  2f FS tc  1 FS
dt dt 2 2 2n
1
- Answer :tc=12s, flimit=3.2 Hz f  n
 f limit
22 t c
 Multiplexing
• Measurement instruments often have multiple inputs and
outputs
• Instead of putting an A/D or D/A converter for every
input/output, we can use multiplexing:
- use an electronic switch for selecting input/output
- antialiasing and reconstruction filters for each input/output
Input multiplexing
Input multiplexing with SH
Output multiplexing
 Key points
• The conversion from analog to digital forms requires sampling
• Sampling frequency fs > 2fmax
• In order to eliminate components with undesired frequencies,
the signal can be filtered using a low-pass filter (antialiasing
filter) with a cut-off frequency fc < fs/2
• Another low-pass filter allows us to reconstruct the signal by
removing the high-frequency components due to sampling
• AD/DA converters
• SH circuits reduce conversion errors
• Multiplexing reduces the number of A/D and D/A converters
and saves money