Foc QP 2
Foc QP 2
FUNDAMENTALS OF COMPUTER
Note: Answer one full question from each section. One full question carries 20 marks
Section-1
1. a) List + Explanation of each (4) number system 2 + 4 X 2= 10M
b) Each correct conversion 5 X 1= 5M
(steps, if correct should be given marks even if final answer is not correct)
c) Writing ASCII code either in Binary / Decimal 5M
Note: 1. As hint is given only for uppercase letters, the alternates given
in model answers may be considered for awarding marks.
2. If code for ‘W’ is written correctly, full marks maybe awarded.
Section-II
3. a) Statement + Logic symbol + Logic expression + Truth table 1 + 1 + 1 + 2= 5M
b) Explanation + Logic diagram + Boolean expression + Truth table 2 + 2 + 2 + 2= 8M
c) Identification of combinational circuit + logic diagram + Explanation 3 + 2 + 2= 7M
4. a) Boolean Laws + Any 4 Boolean Rules 3 + 2= 5M
b) Explanation + Block diagram + Truth table + Boolean Expression + Logic circuit
2 + 1 +2 + 1 +2= 8M
c) Identification of solution to the problem + Logic circuit + Truth table + explanation
1 + 2 + 2 + 2= 7M
Section-III
5. a) Explanation of SISO + logic diagram + Truth table 3 + 3 + 4= 10M
b) Classification + Explanation of each Classification 3M 1 + 2 x 3= 7M
c) List any 3-system software 3M
6. a) Explanation 3 marks + Logic circuit 4 marks + Truth table 3 marks 3 + 4 + 3= 10M
b) List +Explanation any 3 protocol types 2 marks each 1 + 3 x 2 = 7M
c) List 3 marks (any 6) 3M
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Section-IV
7. a) Diagram + Explanation 2 + 3 = 5M
b) Diagram (not mandatory) + Explanation 4 + 6= 10M
(Any relevant diagram – 4m
Any 2 valid points for each functional unit – 6m)
c) Classification of Memory 5M
Section-V
9. a) Any five valid differences 5 x 1= 5M
b) Explanation 5M
c) Flow chart (FC Convention + Input + Process + Output). 2 + 1 + 1 + 1= 5M
d) List + Explanation 1 + 3 = 4M
10. a) Explanation 6M
b) Algorithm 9M
(If the student is able to identify the series occurrence correctly, award full marks and
if, just an attempt to the question is made, award 5 marks)
c) Match each application with the corresponding OS 5 x 1 = 5M
***
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20CS11T
I Semester Diploma Examination, March/April 2022
FUNDAMENTALS OF COMPUTER
Note: Answer one full question from each section. One full question carries 20 marks
Section-1
Divide 246 by 2. Use the integer quotient obtained in this step as the dividend
for
the next step. Repeat the process until the quotient becomes 0. Write the
remainder
from bottom to top i.e. in the reverse chronological order. This will give the
binary equivalent of 246.
Remainder
Dividend
246/2
0
= 123
123/2
1
= 61
61/2 =
1
30
30/2 =
0
15
15/2 =
1
7
7/2 = 3 1
3/2 = 1 1
1/2 = 0 1
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3. (4BA)16= (1210)10
4x162 + Bx161 + Ax160
4x256 + 11x16 + 10x1 = (1210)10
So, the number 1210 is the decimal equivalent of hexadecimal number
4BA
.
4. (101101101)2 =(16D)16
Write the given binary number in groups of 4 starting from right.
1 0110 1101
Each group of 4 equates to 0 through 9 and then A BCDEF, where A
represents 10 and F is 15
So 1101 equals 13 which is D
0110 is 6
And 1 is 1
101101101 equates to 16D in hex.
5. (564)8 = (101110100)2
Take each octal number as input
Convert each digit of octal into 3 digit binary number.
Octal
Binary equivalent
Digit
4 100
6 110
5 101
(564)8 equates to 101110100 in binary
(C) Write the ASCII code for the following word ‘Welcome’.
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2.(a) Which gate is used to implement the following concept? Write the logic
symbol & truth table.
Using the EX-OR GATE we can implement the above mentioned concept.
1. The XOR gate stands for the Exclusive-OR gate.
2. It is a logic gate with two or more inputs and one output.
3. It produces 1 output when odd number of 1’s present otherwise it produces 0
output.
4. The logic circuit of X-OR GATE is
C T Z
0 0 0
0 1 1
1 0 1
1 1 0
(b) Design a suitable logic ckt that has 3 1/p's A, B & C and whose o/p will be
high only when a majority of the i/p's are high.
Step-1: Construct the truth table.
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Step -2: Write the AND term for each case where the o/p is 1 & also Write
the sum of product expression for the o/p.
X = 𝐴BC + A𝐵C + AB𝐶 + ABC
Step -3: Simplify the o/p expression.
X = 𝐴BC + ABC + A𝐵C + ABC + AB𝐶 + ABC
Factoring the appropriate pairs of terms, we have
X = BC ( 𝐴 + A) + AC( 𝐵 + B ) + AB( 𝐶 + C)
Each term in the parenthesis is equal to 1, so we have
X= BC + AC + AB.
Step -4: Implement the logic circuit for the o/p expression.
(c) Analyze the o/p of the following logic ckt & write TT & Boolean
expression.
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SECTION-II
3. (a) State and prove De Morgan’s 1st theorem.
DE Morgan's first theorem is stated as follows:
The complement of a product of variables is equal to the sum of the complements
of the variables.
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2-BIT COMPARATOR:
A 2-bit comparator compares two binary numbers, each of two bits and
produces their relation such as one number is equal or greater than or less than
the other.
The figure below shows the block diagram of a two-bit comparator which has
four inputs and three outputs.
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TRUTH TABLE:
B A D D D D
o 1 2 4
0 0 X
0 0
2 0 0
0 1 1
0 1
X 0 0
0 1
1 0 0 0 X 0
0
1 1 0 0 0 X
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LOGIC CIRCUIT
(C) When 2 i/p of an SR flip-flop is set to high, the o/p is invalid, explain how
this problem is resolved.
Logic Symbol and truth table for S R flip flop
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When the clock is not applied and S = 0, R = 0, flip flop gets disabled, so output
remains in its previous state.
When the clock is applied, S = 0, R = 1, then output goes to a Reset state. So Q
= 0.
When the clock is applied, S = 1, R = 0, then output Q = 1 that means flip flop
is in Set state.
When the clock is applied, S = 1, R = 1, then output goes to a forbidden state
/ invalid state. This invalid state problem can be solved using JK flip flop.
JK Flip flop:
The JK flip flop works in the same way as the SR flip flop work.
The JK flip flop has 'J' and 'K' inputs instead of 'S' and 'R'.
The only difference between JK flip flop and SR flip flop is that when both
inputs of SR flip flop is set to 1, the circuit produces the invalid states as outputs,
but in case of JK flip flop, there are no invalid states even if both 'J' and 'K' flip
flops are set to 1.
When J and K inputs are both HIGH and logic “1”, then the Q output will
change state (Toggle) for as long as the clock input, (CLK) is HIGH.
SECTION III
5 (a) Construct 4-bit SISO shift register
Serial-in-serial-out (SISO) shift register accepts data serially i,e one bit at
a time on a single input line.
It produces the stored information on its single output line in serial form.
Data may be shifted left using shift-left register or shifted right by using
shift- right register
Operation (If in the below sequence, any one occurrence with correct
representation is written, full marks for logic diagram can be awarded)
Assume a data word 1111 is to be stored. Before application of clock signal, let QA
QB QC QD = 0000 and apply LSB bit of the number to be entered to D in. So, Din =
DA= 1. Apply the clock. On the first falling edge of clock, the FF-A is set, and stored
word in the register is QA QB QCQD= 1000
.
Apply the next bit to Din. So Din = 1. As soon as the next negative edge of the clock
hits, FF-B will set and the stored word change to Q A QB QC QD = 1100
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Apply the next bit to be stored i.e. 1 to Din. As soon as the third negative edge of the
clock hits, FF-C will be set and output will be modified toQ AQB QC QD = 1110
Similarly with Din = 1 and with the fourth negative clock edge arriving, the stored
word in the register is QA QB QC QD = 1111.
Truth table
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20CS11T
6. (a) Construct 4-bit asynchronous counter with logic circuit and truth table
4 bit asynchronous ( ripple or serial) counter
• The term Asynchronous refers to events that do not have a fixed time
relationship with each other.
• It is the one in which the flip flops within the counter do not change the states
at exactly the same time because they don't have common clock pulse.
• Asynchronous counters are also called ripple-counters because of the way the
clock pulse ripples it way through the flip-flops.
• The below figure shows a 4-bit binary ripple counter constructed using JK flip
flops.
• The output of FF1 drives FF2, the output of FF2 drives FF3 and the output of
FF3 drives FF4. All the J&K inputs are connected to Vdd, where each flip-flop
toggles on the negative edge of its clock input.
• Consider initially all Flip flops to be in logical 0 state (Q1=Q2=Q3=Q4=0). A
negative transition in clock input drives FF1 and causes Q1 to change from 0
to 1.
• FF2 does not change its state since it also requires negative transition at its
clock input. With the arrival of the second clock pulse to FF1 Q1 goes from 1
to 0. This change of state creates the negative going edge needed to trigger
FF2, and thus Q2 goes from 0 to 1.
• Thus before the arrival of the 16th clock pulse all the FF are in the logical 1
state. Clock pulse 16 causes Q1 Q2 Q3 Q4 to go logic 0 state.
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(b) Explain application layer protocols. list 1m + any 3 protocol types 2 points-
1+6=7m
Protocols in application layer provides following services
It facilitates the user to use the services of the network.
It is used to develop network-based applications.
It provides user services like user login, naming network devices,
formatting messages, and e-mails, transfer of files etc.
It is also concerned with error handling and recovery of the message as a
whole.
The commonly used protocols are HTTP, FTP, SMTP, POP & DNS
DOMAIN NAME SERVICE (DNS):
The Domain Network System (DNS) protocol helps Internet users and
network devices to discover websites using human-readable hostnames,
instead of numeric IP addresses.
A domain name is a human-readable name—like amazon.com
When a user types a human-readable address into the browser, the operating
system’s DNS client will check for information in a local cache. If the
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requested address isn’t there, it will look for a Domain Name System server
in the local area network (LAN).
When the local DNS server receives the query, and the requested domain
name is found, it will return the result.
HYPERTEXT TRANSFER PROTOCOL:
HTTP stands for Hyper Text Transfer Protocol
WWW is about communication between web clients and servers
Communication between client computers and web servers is done by
sending HTTP Requests and receiving HTTP Responses. The World Wide
Web is about communication between web clients and web servers.
Clients are often browsers (Chrome, Edge, Safari), but they can be any type
of program or device.
Servers are most often computers in the cloud.
SIMPLE MAIL TRANSFER PROTOCOL:
A simple mail transfer protocol (SMTP) is used to transfer the mails. The
actual mail transfer is done through MTA i.e. Message Transfer Agents.
To transfer mail from one system to another, the system must have the client
message transfer agents and server message transfer agents.
The client message transfer agent is used to send the mail and server message
transfer agents are used to receive the mail. Simple Mail Transfer Protocol
(SMTP) is the only protocol that defines Message Transfer Agents (MTA)
client and server.
FILE TRANSFER PROTOCOL
FTP (FILE TRANSFER PROTOCOL) is the simplest and most secure way
for exchange of files over the internet.
FTP is a widely used network protocol for transferring files between
computers over a TCP/IP-based network, such as the Internet.
FTP lets people and applications exchange and share data within their offices
and across the Internet.
Transferring files from client computer to sever computer is known as
Uploading and transferring files from a server to a client computer is known
as downloading.
FTP is a set of rules that allow you to transfer files between computers across
the internet without involving email.
A file may contain text document ,images, artwork, movie ,sound ,software
etc
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20CS11T
7. (a) Explain the distributed data processing, how data is arranged and
processed?
Distributed Processing is a technique of distributing the information over
number of devices.
Here various computers (which are located remotely) remain
interconnected with a single host computer
These devices are interconnected with communication facilities. Example
: Internet, Intranet
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Distributed systems are often used to collect, access, and manipulate large
data sets.
It is an arrangement of networked computers in which data processing
capabilities are spread across the network.
Distributed data processing is diverging massive amount of data to several
different nodes running in a cluster for processing.
All the nodes execute the task allotted parallelly, they work in
conjunction with each other connected by a network. The entire set-up
is scalable & highly available
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Input unit
Input units are used by the computer to read the data. The most commonly
used input devices are keyboards, mouse, joysticks, trackballs,
microphones, etc.
Control unit
Memory unit
The Memory unit can be referred to as the storage area in which programs
are kept which are running, and that contains data needed by the running
programs.
The Memory unit can be categorized in two ways namely primary memory
and secondary memory.
The most common examples of primary memory are RAM and ROM.
The most common examples of secondary memory are magnetic disks,
magnetic tapes, and optical disks.
Output Unit
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The primary function of the output unit is to send the processed results to
the user. Output devices display information in a way that the user can
understand.
Output devices are pieces of equipment that are used to generate
information or any other response processed by the computer. These
devices display information that has been held or generated within a
computer.
The most common examples of an output device is a monitor & printer.
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Hackers
Hackers are programmers who put others on threats for their personal gain
by breaking into computer systems with the purpose to steal, change or
destroy information.
(b) Draw the memory hierarchy and label it
Computer memory can be said to be organized in a hierarchical structure, where
memory with the fastest access speeds and highest costs lies at the top whereas those
with lowest speeds and hence lowest costs lie at the bottom.
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BIOS or Basic Input Output System: The first program that runs when the
computer is switched on is called BIOS or Basic Input Output System.
BIOS is a firmware. This software is usually stored in Read Only Memory
(ROM) and located on the motherboard. In modern computer systems, the
BIOS contents are stored in a flash memory.
It is not possible for an operating system to continue without BIOS because,
it loads the drivers of the hard disk and important portions of the operating
system into the memory
UEFI stands for Unified Extensible Firmware Interface.
UEFI was designed to overcome many limitations of the old BIOS.
o UEFI provides faster boot time.
o UEFI is able to provide a GUI (navigation with mouse) as opposed to
BIOS which allows navigation only using the keyboard.
It does the same job as a BIOS, but with one basic difference: it stores all data
about
Initialization and start up in an .efi file, instead of storing it on the firmware
Languages: BIOS is written in assembler, while UEFI is written in simple C-
language.
Drives: UEFI supports larger HDDs and SDDs. UEFI’s theoretical size limit
for bootable drives is more than nine zeta bytes, while BIOS can only boot
from drives 2.2 terabytes or smaller.
Boot time: In most cases, UEFI provides a faster booting time for the
operating system than BIOS.
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(c) Raj has to reach his college at 9:00am.If he leaves his house before 8:00am,
he will go by walk, otherwise he takes a bus. Draw a flow chart for this given
scenario, to output how to travel.
Start
Read Time
N If Time Y
< 8:00AM
Go By Bus Go By Walk
Stop
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Integer Literals
An integer literal can be a decimal, octal, or hexadecimal constant. A prefix
specifies the base or radix: 0x or 0X for hexadecimal, 0 for octal, and nothing for
decimal.
An integer literal can also have a suffix that is a combination of U and L, for
unsigned and long, respectively. The suffix can be uppercase or lowercase and can
be in any order.
Examples:
212 /* Legal */
215u /* Legal */
0xFeeL /* Legal */
Floating-point Literals
A floating-point literal has an integer part, a decimal point, a fractional part, and
an exponent part. You can represent floating point literals either in decimal form
or exponential form.
While representing decimal form, you must include the decimal point, the
exponent, or both; and while representing exponential form, you must include the
integer part, the fractional part, or both. The signed exponent is introduced by e or
E.
Examples:
3.14159 /* Legal */
314159E-5L /* Legal */
Character Constants
Character literals are enclosed in single quotes, e.g., 'x' can be stored in a simple
variable of char type.
A character literal can be a plain character (e.g., 'x'), an escape sequence (e.g., '\t'),
or a universal character (e.g., '\u02C0').
There are certain characters in C that represent special meaning when preceded by
a backslash for example, newline (\n) or tab (\t).
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String Literals
String literals or constants are enclosed in double quotes " ". A string contains
characters that are similar to character literals: plain characters, escape sequences,
and universal characters.
We can break a long line into multiple lines using string literals and separating
them using white spaces.
Examples:
"hello, dear"
"hello, \
dear"
"hello, " "d" "ear"
(If the student is able to identify the series occurrence correctly, award full marks
or just an attempt to the question is made, award 5 marks)
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20CS11T
Explanation:
1, 2, 4, 7, 11, 1 6, 22, 29
First Term = 1
Second term = First Term +1 =1+1=2
Third Term = Second term + 2 = 2+2 =4
Fourth term = Third Term + 3 =4+3 = 7
Fifth Term = Fourth term + 4 = 7+4 = 11
Sixth Term= Fifth Term +5 = 11+5 = 16
Seventh Term = Sixth Term + 6 = 16+6 = 22
Eighth Term = Seventh Term + 7 = 5+8 = 29 and so on
Algorithm:
1. Start
2. Read first_term, max_term, incr, next_term.
3. Initialize first_term =1, incr=1, next_term=0, max_term=n
4. Repeat thru step 8 until incr <= max_term
5. next_termfirst_term + incr
6. Write first_term
7. first_term next_term
8. incr incr + 1
9. Stop
4. Android A. Mobile OS
5. Peer to Peer D. Network OS
CERTIFICATE
This is to certify that all the model answers prepared by me for subject FUNDAMENTALS
OF COMPUTER (20CS11T) are as per syllabus.
Ashwini M S
Lecturer/CS&Engg.
Govt. Polytechnic,Channapatna
Board Members:
Sd/-
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