Sinusoidal Commutation With HALL UG
Sinusoidal Commutation With HALL UG
Sensors
Users Guide
Table of Contents
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Reference Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
19
22
23
23
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4 User Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
A Product Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Customer Service . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Customer Technical Support Center . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Website . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contacting the Customer Technical Support Center . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ITAR Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Introduction
Microsemi offers a simple, low-cost way to try the SmartFusion products for the development of motor
control application. The SmartFusion customizable system-on-chip (cSoC) field programmable gate
array (FPGA) devices contain a hard embedded microcontroller subsystem (MSS), programmable
analog circuitry (ACE), and FPGA fabric consisting of logic tiles, static random access memory (SRAM),
and phase-locked loops (PLLs). The MSS consists of a 100 MHz ARM Cortex-M3 processor,
communications matrix, system registers, Ethernet MAC, DMA engine, real-time counter (RTC),
embedded nonvolatile memory (eNVM), embedded SRAM (eSRAM), and fabric interface controller
(FIC).
The SmartFusion cSoC devices have major advantages in terms of fabric, MSS, and ACE in the
development of motor drives and control, power supply regulators, solar inverters etc. With a fabricbased motor controller, the designers have the advantage of flexibility in terms of design and having
reliable and deterministic performance.
The SmartFusion Evaluation Kit Board and SmartFusion Development Kit Board are developed in a
generic way that can be used with the custom inverter board for the development of majority of the motor
control applications. This users guide explains in detail the design of Closed loop speed control of
Brushless DC motor with sinusoidal commutation using Hall Sensors that is developed based on the
following hardware platform:
The SmartFusion Development Kit Board (A2F-DEV-KIT) or the SmartFusion Evaluation Kit
Board (A2F-EVAL-KIT) with an A2F200 device. In case of any new version of the board with
A2F500 the project has to be recompiled.
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Introduction
Reference Documents
1. SmartFusion cSoC User Guides & Manuals
(www.microsemi.com/soc/products/smartfusion/docs.aspx)
2. SmartFusion Development Kit Board Users Guide
(www.microsemi.com/soc/documents/A2F500_DEV_KIT_UG.pdf)
3. SmartFusion Evaluation Kit Board Users Guide
(www.microsemi.com/soc/documents/A2F_EVAL_KIT_UG.pdf)
4. Trinamic Kit User Manual
(http://www.trinamic.com/tmctechlibcd/integrated_circuits/TMCM-AC-840/TMCM-AC840_manual.pdf)
5. Trinamic 603A chip User Manual
(http://www.trinamic.com/tmctechlibcd/integrated_circuits/TMC603/tmc603_datasheet.pdf)
6. BLDC motor datasheet
(http://www.trinamic.com/tmc/media/Downloads/QMot_motors/QBL4208/QBL4208_manual.pdf)
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60
120
180
240
300
360
Phase A
Phase B
Phase C
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Electrical degrees
0
60
300 360
Phase A
Phase B
Phase C
15
001
90
101
01
1
30
CCW
01
33
110
21
100
270
Figure 1-3 Hall State Change vs Corresponding Angle for CCW Direction
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Figure 1-4 PWM Cycle Counts Between Two Hall Event Change
The angle of increment count corresponds to 360 degree of electrical revolution. It is calculated using the
following formula:
Angle Increment per electrical revolution = (Number of PWM counts between Hall Change)/((Fabric
Frequency in MHz*PWM Frequency in s))
EQ 1-1
The angle of increment between Hall states or within 60 electrical degrees is calculated using the
following formula:
Angle Increment within 60 degrees = (Angle Increment per Electrical revolution)/(60)
EQ 1-2
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Phase A
Phase B
Phase C
SVPWM Generation
The instantaneous space vector voltages of all the phases are computed using the following formulae:
Voff= [min(VoltageA, VoltageB, VoltageC) + max(VoltageA, VoltageB, VoltageC)]/2
EQ 1-7
Where VoltageA, VoltageB, and VoltageC are sinusoidal voltages of phases A,B, and C. These are
calculated using the above mentioned sinusoidal voltage generation theory.
VoltageAnew = VoltageA Voff
EQ 1-8
VoltageBnew = VoltageB Voff
EQ 1-9
VoltageCnew = VoltageC Voff
EQ 1-10
The final space vector voltage waveforms are shown in Figure 1-6.
VoltageAnew
VoltageBnew
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VoltageCnew
Speed
Reference
DutyCycle
Calculation
DutyCycle
Commutation
Logic
Inverter
Bridge
PWM
BLDC
Hall Signal
Speed
Reference
+_
Error
PI Controller
DutyCycle
Commutation
Logic
PWM
Inverter
Bridge
BLDC
Speed
Actual
Speed
Calculation
Hall Signal
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PI Controller
The regulation of speed is done with the PI controller. The error difference between the actual speed and
reference speed is calculated at every PWM cycle and is given as an input to the PI controller. The
proportional and integral gains of the controller are configurable using UART commands.
Ymax
Reference Speed
Proportional
Gain
Error
Integral
Gain
DutyCycle
Ymin
Integrator
10
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End
Reference
Speed
(End User)
Start
Ramp Function
Reference
Speed
+
PI Controller
Sine
Commutation
Inverter
Bridge
BLDC
Motor
Angle
Calculation
Speed
Calculation
Hall Pattern
Detection
HALL1
HALL1
HALL2
HALL2
HALL3
HALL3
HALL Logic
Trinamic Board
Figure 2-1 Design Blocks of Closed Loop Speed Control Operation of BLDC Motors
Hardware Implementation
The logic implemented in the FPGA fabric runs on 75 MHz clock from clock conditioning circuit (CCC) in
MSS. Figure 2-2 on page 12 shows the flow chart of the algorithm implemented in the FPGA fabric. After
the reset from the MSS, the APB slave implemented in the FPGA fabric starts communicating with the
MSS through FIC. The APB slave decodes all the configuration data from the Cortex-M3 processor and
assigns the configuration data like Ki, Kp, error, PWM period, and dead time values to different modules.
Once the PWM period and dead time are configured and PWM generation is enabled from Cortex-M3
processor, then the PWM count starts ticking and the count is passed to PWM compare match unit for
every clock. The Cortex-M3 processor programs the error value to the PI controller; the PI controller
calculates the magnitude and passes it to the sine commutation logic. The sine commutation logic takes
the angle information from the Cortex-M3 processor and it calculates the PWM ON period, then the PWM
ON values are passed to the PWM compare match unit. The compare match unit generates 3 PWM
signals. These three PWM signals are fed to the dead time controller, which in turn generates 3 PWM
signals to the high side of the Inverter Bridge and 3 PWM signals to the low side of the Inverter Bridge.
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S tart
A P B Interface
(C om m unication
w ith M 3 processor
through F IC )
If P W M G eneration is enabled
Configuration of different
parameters like Ki, Kp, Error,
PWM frequency, Dead time,
and Angle
Cortex- M 3
P rocessor
If P I Controller is enabled
P I C ontroller
G eneration of P W M tick
A ngle
M agnitude
P W M O n tim e values
Figure 2-2 Design Blocks of Closed Loop Speed Control Operation of BLDC Motors
The speed calculation logic takes the synchronized HALL signals from the motors and calculates the
number of clock cycles between 6 continuous HALL events; this value is passed on to the Cortex-M3
processor for speed calculation in terms of RPM. Table 2-1 shows the details of the modules
implemented in FPGA fabric.
Table 2-1 Modules Implemented in FPGA Fabric
S.No
12
Module Name
Description
ms_m_ctrl_sc_fabric_top.vhd This module is the top-level module, that integrates all the sub modules.
apb_if.vhd
This module interfaces with the Cortex-M3 processor and decodes all the
configurations required for the blocks in fabric.
pi_ctrl_sine_comm.vhd
This module has two major blocks: the PI controller and the sine commutation
logic. The PI controller takes the speed error (Desired speed - Actual speed)
from the MSS and generates the amplitude for the sine commutation. The
implementation of this module is the same as the functionality mentioned in
the "PI Controller" section. In this Microsemi's standard macros 32-Bit adder,
16x16 signed multipliers are used. It takes about ~ 20 clock cycles to
complete the operation. The sine commutation logic takes the angle values for
three phases from the MSS and generates the ON time for three PWMs.
pwm_gen.vhd
This module takes the PWM ON time values from the sine commutation logic,
and compares it against the PWM count and generates the PWM signals.
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pwm_count.vhd
This module generates a sync pulse for every PWM period and PWM current
count to generate the PWM signals. The width of the PWM counter is 14-bit
and it is edge aligned.
pwm_comp.vhd
This module generates the complementary signals for low side switches.
hall_sync.vhd
This module synchronizes the HALL signals and generates the HALL pattern.
hall_speed_calc.vhd
This module takes the synchronized HALL signals and calculates the number
of system clocks between six consecutive HALL events. This information will
be used by the Cortex-M3 processor to calculate the speed of the motor in
revolutions per minute (RPM).
Software Implementation
The MSS operates at 75 MHz frequency and does the job of controlling and monitoring parameter
configurations of the sinusoidal commutation control algorithm. The complete motor control sinusoidal
commutation algorithm is implemented in fabric. Hence, the MSS consumes much less CPU time
(~ 21 s) and allows the system level application to work independently. For a PWM frequency of 20 kHz,
the CPU load will be < 42%.
Figure 2-3 on page 14 shows the flow chart of the control and monitoring algorithm implemented in the
software. The initialization of the MSS peripherals like watchdog, ACE, PWM, and PI controller in fabric is
done after the reset. After the initialization, a while loop runs indefinitely. The UART data from the GUI is
processed in this while loop. The GUI communicates with the MSS through UART to program the
configuration and control parameters of the motor.
Once the configuration and control parameters are programmed, it enables the PWM generation in the
fabric. The fabric generates an interrupt to the ACE to sample the current values; after the sampling is
done, the ACE generates an interrupt to the MSS. The MSS collects the current samples and then
communicates it with the fabric to derive the actual motor speed in RPMs. After this, the speed error
(Desired speed - Actual speed) is calculated and the error is programmed to the FPGA fabric. At that
point, the FPGA fabric controls the motor.
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S tart
1. M S S Initializations
2. B LD C M otor Initializations
C om m unication
w ith host
through U A R T
GUI
R unning on
H ost
If C onfiguration is done
Or
C hange in configuration
A C E is start/restart for
sam pling the phase currents
14
Function
Description
init_system()
bldc_sine_comm_init()
This function initializes the PWM block, PI controller in fabric, and some of
the variables in the MSS.
process_uart_data()
This function communicates with the graphical user interface (GUI) running
on the host PC and decodes all the parameters and configures the different
sections of the algorithm.
ACE_PC0_Flag0_IRQHandle() This is the ISR, mapped to the ACE, which indicates completion of the
current sampling. This interrupt handler is invoked upon the occurrence of
Interrupt from the ACE. The sampling sequence to sample the current is
invoked for every PWM frequency and thus the ACE interrupt occurs at
PWM frequency. In this routine the motor currents are sampled and
translated to the original values. The speed measurement is read from the
fabric and the actual speed in terms of RPM is calculated. The speed error
(Desired speed Actual speed) is calculated and the same will be
programmed to the PI controller in the FPGA fabric.
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GPIO7_IRQHandler()
This is the ISR, mapped to the GPIO 7, which indicates start of the current
sampling. This occurs once in every PWM cycle. In this function the ACE is
restarted for current sampling.
angle_estimation()
This implements the angle estimation logic using HALL and Interpolation
technique. The angles for all three phases are derived and the
corresponding sine values are programmed to the sine commutation logic in
the FPGA fabric. The SVPWM logic is implemented in the FPGA fabric, the
min and max identification among the above mentioned three phases will be
programmed to FPGA fabric.
Min Max register definition:
max_min_reg[1:0] = 01---> Phase A has minimum value
max_min_reg[1:0] = 10---> Phase B has minimum value
max_min_reg[1:0] = 11---> Phase C has minimum value
max_min_reg[3:2] = 01---> Phase A has maximum value
max_min_reg[3:2] = 10---> Phase B has maximum value
max_min_reg[3:2] = 11---> Phase C has maximum value
Programming max_min_reg[3:0] to value 0 will enable sine PWM (SPWM).
This can be done using small modifications in this function.
PIControllerSpeed
(int32_t reference, int32_t act)
This function takes the reference speed and actual speed of the motor as
inputs and calculates the error. The error is programmed to PI controller in
the FPGA fabric. This function also integrates the ramp up, ramp down
profile for motor start, stop, and direction change based on the ramp profile
enable selection. In some of the applications, a soft start/stop or acceleration
of the motor is required. The reference speed is incremented or
decremented until the required speed reference is reached at the rate of the
ramp up speed specified or configured. However, the functionality can be
disabled if required.
The speed end reference is incremented or decremented based on the ramp
rate you specify until the set reference speed is reached and the flag
increment_speed is cleared with the value 0. As this function is called at
every PWM period, the variable g_ramp_counter is incremented by 1 and
compared with the g_ramp_count. Whenever the g-ramp-counter value
exceeds the g_ramp_count, the flag increment_speed is set to 1.
speed_cal_hall()
This function reads the number of system clocks between six consecutive
HALL events and calculates the actual motor speed in RPM.
Table 2-3 shows the macros defined in the bldc_sc.h file used to configure the different parameters of
the sinusoidal commutation algorithm.
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Macro Name
Description
PWM_PERIOD_VAL
This value defines the PWM period. To set the PWM frequency as 20 KHz (50 s)
the value should be 3750 (50 * 10(- 6) * FPGA Frequency).
PWM_DEAD_TIME_VAL This value defines the dead time for inverter bridge. Now the value is ~ 1 s.
FAB_FEQ
IMAX
This is the maximum allowed current in Amperes that is used to derive the actual
phase currents.
PWM_FREQ_IN_US
HALL_001
HALL_010
HALL_011
HALL_100
HALL_101
HALL_110
7
HALL_010_ELE_ANGL
HALL_110_ELE_ANGL
HALL_100_ELE_ANGL
These values define the electrical angles corresponding to the HALL events.
These values need to be identified and set to appropriate values for different
motors.
HALL_101_ELE_ANGL
HALL_001_ELE_ANGL
HALL_011_ELE_ANGL
Table 2-4 shows the address mapping for different parameters in the FPGA fabric.
Table 2-4 Parameter Address Mapping in FPGA Fabric
S.No
16
Register Name
Register
Address
Description
PWM_PERIOD_REG_ADDR
PHASEA_THETA_REG_ADDR
PHASEB_THETA_REG_ADDR
PHASEC_THETA_REG_ADDR
PWM_DEAD_TIME_REG_ADDR 0x40050010UL This defines the address of the Dead time register.
PWM_EN_REG_ADDR
HALL_REG_ADDR
HALL_SPEED_VAL_REG_ADD
R
PI_KI_REG_ADDR
10
PI_KP_REG_ADDR
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PI_ERROR_REG_ADDR
12
PI_RESULT_REG_ADDR
Performance Details
Table 2-5 shows the software and FPGA performance details.
Table 2-5 Performance Details of Sinusoidal Commutation Algorithm in A2F200 Device
S.No
Parameter
Description
Code size
~ 61 KB
MSS frequency
75 MHz
PWM frequency
20 KHz
Resource Utilizations
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Gauge
Function
Red
UL1007 AWG 26
Blue
UL1007 AWG 26
Hall A
Green
UL1007 AWG 26
Hall B
White
UL1007 AWG 26
Hall C
Black
UL1007 AWG 26
Yellow
UL1007 AWG 20
Phase U
Red
UL1007 AWG 20
Phase V
Black
UL1007 AWG 20
Phase W
24
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For higher current ratings (loaded conditions) DC external regulated power supply can be used and the
BLDC driver can support for the maximum voltage of 48 V and 4A. For power supply connection refer to
Figure 3-7.
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4 User Interface
1. Identify your COM port for the USB to UART Bridge in Device Manager.
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User Interface
3. Make sure that the following options are selected in Figure 4-2 on page 27:
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Select the correct COM port as specified in the Device Manager and set the Baud Rate to
57600.
Click Connect to establish connection with the COM port. The GUI is programmed with the
default configurations to run the default motor (QBL4208-41-04-006) that comes with the kit
without any additional configurations.
Speed Configuration: Typically the value should be between 500 and 5000 RPM. For default
motor, the desired speed is 3000 RPM.
Speed Ramp Configuration: (Default = Enabled, default value = 500): The default value of
ramp up rate is 500 RPM/s. The maximum value should be less than desired speed. Minimum
value should be greater than zero. Higher the RAMP value, lesser is the time to reach the
desired speed.
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5 Conclusion
This users guide uses the features of SmartFusion cSoC FPGAs to develop an effective motor control
demo by partitioning the algorithms and implementing it in MSS and fabric effectively. Having the
functional blocks in fabric, the CPU is offloaded and the MSS can perform any other system level
operations. This Sinusoidal commutation application has all the control functions implemented in fabric
and MSS made to perform only control and monitoring functions.
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Customer Service, Customer Technical Support Center, a website, electronic mail, and worldwide sales
offices. This appendix contains information about contacting Microsemi SoC Products Group and using
these support services.
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Contact Customer Service for non-technical product support, such as product pricing, product upgrades,
update information, order status, and authorization.
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From the rest of the world, call 650.318.4460
Fax, from anywhere in the world, 408.643.6913
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Visit the Customer Support website (www.microsemi.com/soc/support/search/default.aspx) for more
information and support. Many answers available on the searchable web resource include diagrams,
illustrations, and links to other resources on the website.
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You can browse a variety of technical and non-technical information on the SoC home page, at
www.microsemi.com/soc.
Email
You can communicate your technical questions to our email address and receive answers back by email,
fax, or phone. Also, if you have design problems, you can email your design files to receive assistance.
We constantly monitor the email account throughout the day. When sending your request to us, please
be sure to include your full name, company name, and your contact information for efficient processing of
your request.
The technical support email address is soc_tech@microsemi.com.
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Product Support
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Cases.
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50200322-0/06.12